Senior RTL Design Engineer - Mixed-Signal IP & Verification

AAC Technologies; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

AAC Technologies in Singapore seeks a Senior Digital IC Design Engineer with 7+ years of experience to lead mixed-signal subsystem design from implementation to silicon delivery.

You will work on IIC, I2S and SoundWire interfaces, RTL design, and high-level modelling for IP blocks. The role includes design reviews, timing and power analysis, and cross-functional silicon bring-up support.

Qualifications

• Bachelor or Master degree in Electrical and Electronic Engineering with 7+ years in digital CMOS IC design.
• Proficient in Verilog RTL design and high-level modelling for subsystem evaluation.
• Strong knowledge of IIC, I2S and SoundWire interface designs.

Responsibilities

• Mixed-signal subsystem design from implementation to chip-level delivery.
• Conduct micro-architectural studies for optimal hardware of IP blocks.
• Prepare design and verification reviews with technical staff.
• Perform logic synthesis, timing, and power analysis to optimize designs.
• Support pre-silicon verification and silicon bring-up with cross-functional teams.

Skills

Digital CMOS IC design

I2S interface design

IIC interface design

SoundWire interface design

Verilog RTL design

High-level modelling

Education

Bachelor or Master degree in Electrical & Electronic Engineering

Tools

Logic simulators

Waveform browsers

Power analysis tools

Spice co-simulation

Job description

AAC Technologies in Singapore seeks a Senior Digital IC Design Engineer with 7+ years of experience to lead mixed-signal subsystem design from implementation to silicon delivery.

You will work on IIC, I2S and SoundWire interfaces, RTL design, and high-level modelling for IP blocks. The role includes design reviews, timing and power analysis, and cross-functional silicon bring-up support.