Senior NPU Design Engineer — Microarchitecture & Low-Power RTL

ovt; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

ovt in Singapore seeks an experienced hardware design engineer to drive NPU/SoC development from concept to implementation. You will define design requirements, model performance, and code RTL for sub-blocks, while optimizing power, area and timing across the project.

You will collaborate with verification and software teams, contribute to documentation, and guide a small design team through cycles of design, linting and integration.

Qualifications

• 8+ years of digital design with at least 2 to 3 years of SoC design experience.
• At least one cycle of NPU design completion experience.
• Hands on experience in digital design is a must.
• Preferably has led a team of at least 3 to 4 people in the past at the capacity of a design lead.
• Experience in microarchitecture design, and RTL coding with Verilog/ System-Verilog.
• Experience in synthesis, with analysis of power, timing and area.
• Disciplined, quality-minded, and highly driven for excellence.
• Excellent team player and good communication skills.
• Understanding of convolution operator and number system is required.
• Experience with past design experience with NPU / GPU / DSP design is a plus.
• Experience with ARM or RISC-V processor systems is a plus.
• Being passionate and proficient at general programming is a plus.

Responsibilities

• Develop design requirements for an NPU based on system level specifications.
• Modelling the performance of the NPU module and its data transaction throughput.
• Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU.
• Understanding the mathematics of different convolution operators including different arithmetic formats (fixed point and floating point)
• Estimate, measure and optimize PPA (Performance / Power / Area) to meet key objectives and results.
• Optimizing micro-architecture design for low power and area is required.
• Work closely with verification engineers to ensure comprehensive testing and debug any issues.
• Support integration into the overall system, conducting design checks, and addressing lint/timing/CDC issues.
• Collaborate with software teams to assist in compiler and toolchain development and their debugging.
• Produce clear and concise design documentation.

Skills

NPU design

RTL design

Verilog/SystemVerilog

SoC design experience

Digital design

Microarchitecture design

Power/Area/Performance optimization

Team lead experience

UVM verification

CNN/Transformer knowledge

ARM/RISC-V familiarity

Programming

Convolution math

Synthesis timing analysis

Debugging

Education

MSEE/BSEE in Electrical Engineering or Computer Engineering

Tools

-

Job description

ovt in Singapore seeks an experienced hardware design engineer to drive NPU/SoC development from concept to implementation. You will define design requirements, model performance, and code RTL for sub-blocks, while optimizing power, area and timing across the project.

You will collaborate with verification and software teams, contribute to documentation, and guide a small design team through cycles of design, linting and integration.