Senior Engineer – HBM PE Component Validation (Singapore)

1100 Micron SemiAsiaOP Pte Ltd; Singapore; On-site; SGD 70,000 - 100,000; Full time

Job summary

1100 Micron SemiAsiaOP Pte Ltd is seeking an experienced engineer to execute HBM Validation in a fast-paced environment. Key responsibilities include validating IQP/ETV materials, operating test platforms, and performing high-speed I/O checks under various conditions.

The ideal candidate holds a Bachelor’s degree in Electrical or Computer Engineering and has over 5 years of validation experience, including specific expertise in MBIST and Verilog simulation. Proficiency in Python/Perl scripting and collaboration skills are essential.

Qualifications

• 5+ years in DRAM/HBM/NAND validation or product engineering.
• At least 2 years of HBM Validation experience.
• Test platform code development in C/C++, Python, and APG.
• Hands‑on experience with MBIST and Mode testing.

Responsibilities

• Execute Validation Runs on IQP/ETV materials.
• Operate and debug programs on SM3/Cobra and Advantest V93K.
• Validate high-speed I/O; perform jitter and signal integrity checks.
• Automate workflows and maintain documentation.

Skills

Debugging and collaboration

Python/Perl scripting

High-speed I/O validation

Verilog simulation

Technical analysis

Education

Bachelor’s in Electrical or Computer Engineering

Tools

Confluence

Jira

Git

Perforce

C/C++

Job description

Key Responsibilities

• HBM Validation Execution: Execute Validation Runs on IQP/ETV materials in a high‑pressure, fast‑paced environment, meeting tight start/finish windows, material utilization plans, and readiness checkpoints. Deliver time‑bound data crunching (log parsing, statistical summaries, anomaly triage) and publish concise, high‑quality summary reports/sightings by agreed TAT (turnaround time) targets. Ensure coverage completeness across MBIST and Mode flows; perform Hot/Cold corners, TSV screen/AQLK, and async timing boundary checks.
• Platform Expertise: Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K. Support hardware readiness: handler, socket, loadboard, probe card coordination aligned to test intent.
• Technical Analysis & Verilog Simulation: Validate high‑speed I/O (≥10Gbps); perform eye diagram, jitter, and signal integrity checks under P/V/T corners. Measure IDD power profiles and thermal behavior under realistic stress conditions. Develop/execute Verilog testbenches and simulations to reproduce/triage sightings, correlate bench and platform behavior, and inform content fixes.
• Data & Automation: Review logs, crunch data, and automate workflows using Python/Perl. Maintain documentation in Confluence/Jira and version control in Git/Perforce.
• Debug & Collaboration: Assist in root‑cause analysis and corrective action closure with Design, DV, QA, GQ, TSE. Create and deliver technical presentations; participate in cross‑site meetings for silicon readiness.

Minimum Requirements

• Bachelor’s in Electrical or Computer Engineering (or related).
• 5+ years in DRAM/HBM/NAND validation or product engineering.
• At least 2 years of HBM Validation experience.
• Test platform code development in C/C++, Python, and APG (Algorithmic Pattern Generator).
• Hands‑on experience with MBIST (SM3/Cobra) and Mode (Advantest V93K) testing.
• Verilog simulation experience (writing testbenches, running sims, interpreting waveforms/logs).
• Familiarity with high‑speed I/O validation and power/thermal characterization.
• Proficiency in scripting (Python/Perl) and data analysis tools; strong communication and presentation skills.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact [e-mail].