HBM Staff Component Validation Engineer

1100 Micron SemiAsiaOP Pte Ltd; Singapore; On-site; SGD 100,000 - 150,000; Full time

Job summary

1100 Micron SemiAsiaOP Pte Ltd in Singapore is seeking a Principal Engineer for the High Bandwidth Memory (HBM) Component Validation team. This role involves defining new standards for validation development and optimizing test flows to ensure stability and scalability.

With over 10 years of semiconductor experience, the candidate will lead technical innovation and mentor junior engineers while contributing to cutting-edge HBM technologies.

Qualifications

• 10+ years proven experience in semiconductor product engineering (DRAM/HBM preferred).
• 7+ years hands-on test pattern and code development experience.
• Demonstrated experience implementing DFT/functional testing.

Responsibilities

• Drive and develop test programs for HBM component validation.
• Deliver on-time test program releases aligned with milestones.
• Coach and develop technical growth of engineers.

Skills

C/C++

Python

Analytical Skills

Problem-Solving

Education

Bachelor/Master’s degree in Electrical & Electronic or Computer Engineering

Tools

ATE (Teradyne, Advantest)

Confluence

Jira

Git

Perforce

Job description

About the Role

As Principal Engineer in Micron’s High Bandwidth Memory (HBM) Component Validation team, you will contribute as Subject Matter Expert (SME) and Technical authority and contribute to define new standards on validation development for advanced HBM products and ensure stable, scalable validation testing infrastructure with zero code‑related escapes across MBIST, test modes and high speed memory validation. You own optimizing test flows, and lead technical innovation and problem solving for next generation HBM products. You’ll drive validation development deliverables and mentor junior engineers.

Why Join Us

You will gain hands‑on experience with cutting‑edge HBM technologies and validation platforms, working alongside global experts. This role offers opportunities to learn advanced validation techniques, drive and deliver product readiness, technology solutions and innovations, and grow into technical leadership roles.

Responsibilities

• Drive and develop and maintain test programs for HBM component validation.
• Deliver on‑time test program releases aligned with validation milestones and drive code quality, reviews, and release best‑practices.
• Drive best‑in‑class test time optimization and parallelism improvements.
• Drive test stability and repeatability across sites and equipment.
• Drive test program debug on MBIST and native mode testers.
• Coach and develop technical growth of other engineers in validation approaches, platform nuances, simulation methodology, and reporting standards.
• Drive test equipment qualification and re‑qualification.
• Drive hardware readiness setup for handler, socket etc.
• Perform validation capacity forecasting based on product ramps and coverage needs.
• Own validation platform health, availability and uptime.
• Support validation platform pathfinding.
• Define/implement new standards for continuous improvement in test pattern development and validation test infrastructure.
• Validate high‑speed I/O and assist with eye diagram and signal integrity checks.
• Maintain documentation in Confluence/Jira and version control in Git/Perforce.
• Drive root cause analysis sessions and corrective action closure.
• Drive/collaborate across Component Validation team and with cross‑functional teams for design validation, execution, electrical failure analysis, lab support and others.

Minimum Qualifications

• Bachelor/Master’s degree in Electrical & Electronic or Computer Engineering (or related) with 10+ years proven experience in semiconductor product engineering (DRAM/HBM preferred).
• 7+ years hands‑on test pattern and code development experience using C/C++, Python on ATE (Teradyne, Advantest etc) and familiarity with APG (Algorithmic Pattern Generator).
• 7+ years technical experience as Product Development Engineering lead.
• Demonstrated technical work experience implementing DFT/ functional testing (loopback, MBIST, scan etc) and relevant knowledge in Computer Architecture/DRAM concepts and flows.
• Applicants with senior engineering experience in Analog Mixed Signal design and verification or ASIC design and verification or silicon validation may be considered.
• Preferred experience: Relevant semiconductor engineering experience in implementing AI, automation and continuous improvement initiatives.
• Strong communication, analytical and problem‑solving skills; flexibility to work in a fast‑paced environment.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.