Senior DRAM Architect: Novel Materials & 3D Interconnects

Brightecs Innovation Pte Ltd; Singapore; On-site; SGD 180,000 - 250,000; Full time

Job summary

Brightecs Innovation Pte Ltd in Singapore seeks an accomplished DRAM memory architect with 8+ years of experience to lead memory development efforts. You will drive cross-functional coordination across circuit, device, firmware, verification, testing, and product teams, focusing on novel DRAM transistor channel materials, memory architecture design, and integration technologies.

Your work will influence design choices, performance optimization, and reliability modeling, with opportunities to

Qualifications

• 8+ years of DRAM memory development experience.
• At least 5 years as architecture or key technology lead.
• Familiar with TLC/QLC/PLC multi-bit memory mechanisms and their challenges to read/write algorithms, ECC, and wear leveling.
• Excellent systems thinking and cross-domain integration capabilities, able to coordinate circuit, device, firmware, verification, testing, and product teams.
• Publication of DRAM-related papers at ISSCC, VLSI, or IMW is a plus.

Responsibilities

• Lead research and integration of advanced DRAM memory architectures.
• Define processes for ultra-scaled junction formation and low-thermal-budget integration.
• Develop DRAM transistor channel materials and novel device designs.
• Advance key processes and process integration technologies for DRAM reliability and performance.
• Drive collaboration across circuit, device, firmware, verification, testing, and product teams.

Skills

Cross-domain coordination

Systems thinking

Technical documentation

Communication

Memory architecture

Education

Master's degree or above (PhD preferred)

Job description

Brightecs Innovation Pte Ltd in Singapore seeks an accomplished DRAM memory architect with 8+ years of experience to lead memory development efforts. You will drive cross-functional coordination across circuit, device, firmware, verification, testing, and product teams, focusing on novel DRAM transistor channel materials, memory architecture design, and integration technologies.

Your work will influence design choices, performance optimization, and reliability modeling, with opportunities to