Scientist (IC Designer), IME

A*STAR - Agency for Science, Technology and Research; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

A*STAR – Agency for Science, Technology and Research in Singapore seeks a researcher to develop intelligent design automation tech for analog and mixed-signal ICs. The role combines AI/LLM-based circuit design, optimization algorithms, automated layout generation, EDA integration, and software development.

You will collaborate with IC designers, AI researchers, CAD/EDA engineers and project partners to build reusable design automation modules, evaluate AI approaches, and integrate flows with

Qualifications

• PhD in a relevant field with strong research or engineering background.
• Experience in analog/mixed-signal IC design, EDA, or AI-based optimization.
• Proficiency with Cadence tools (Virtuoso, Spectre, SKILL) and Python.
• Knowledge of IC design flows: simulation, sizing, layout, extraction, verification.
• Familiarity with Linux, scripting, APIs, and automated EDA workflows.

Responsibilities

• Develop AI-based circuit design and optimization flows using LLMs and ML methods.
• Create automated layout generation engines with Python and SKILL.
• Integrate modules into Cadence Virtuoso/Spectre workflows.
• Build reusable PDK-aware design automation modules and evaluation frameworks.
• Evaluate AI approaches for circuit reasoning, sizing, and layou t generation.
• Collaborate with IC designers, AI researchers, CAD/EDA engineers and partners.

Skills

Python programming

AI/ML knowledge

Circuit design knowledge

Design automation

Software development

Technical communication

Team collaboration

Education

PhD in Electrical/Electronic Engineering

PhD in Computer Engineering

PhD in Computer Science

Tools

Cadence Virtuoso

Cadence Spectre

Cadence SKILL

Python

Linux

Git

SSH

Job description

We are looking for a candidate to develop intelligent design automation technologies for analog and mixed-signal integrated circuits. The role combines AI/LLM-based circuit design, optimization algorithms, automated layout generation, EDA integration, and software development.

Key Responsibilities

• Develop AI-based circuit design and optimization flows using LLMs, machine learning, optimization algorithms, and Cadence EDA tools.
• Develop automated circuit layout generation engines using Python, Cadence SKILL, and related design automation interfaces.
• Integrate the circuit design, simulation, layout generation, and optimization modules into Cadence Virtuoso/Spectre design workflows.
• Build reusable PDK-aware design automation modules, benchmark circuits, and evaluation frameworks.
• Evaluate AI approaches for circuit reasoning, sizing, layout generation, optimization, and automated design assistance.
• Collaborate with IC designers, AI researchers, CAD/EDA engineers, and project partners.

Required Qualifications

• PhD in Electrical/Electronic Engineering, Computer Engineering, Computer Science, or a related field.
• Strong research or engineering experience in analog/mixed-signal IC design, EDA, design automation, or AI-based engineering optimization.
• Experience with Cadence Virtuoso, Spectre, SKILL, or comparable IC design and simulation tools.
• Strong proficiency in Python and experience with scientific or engineering software development.
• Good understanding of analog IC design flows, including simulation, device sizing, layout, parasitic extraction, and verification.
• Knowledge of machine learning, LLMs, optimization algorithms, or agentic AI workflows.
• Strong problem-solving, software development, and technical communication capabilities.
• Ability to work effectively across IC design, AI, and software engineering disciplines.

Others

• Experience with automated analog layout generation, placement, routing, PCells, or constraint-driven physical design.
• Familiarity with DRC, LVS, PEX, PDKs, and physical verification workflows.
• Familiarity with Linux, Git, SSH, scripting, APIs, and automated EDA workflows.
• Experience with LLM agents, RAG, multimodal models, or AI-assisted circuit design.
• Publications, patents, open-source contributions, or industrial EDA/IC design experience would be advantageous.