Physical Design Manager

GK CONSULTING PTE. LTD.; Singapore; On-site; SGD 180,000 - 260,000; Full time

Benefits offered by this job

Annual bonus

Premium insurance coverage for you and

Team-building activities

Job summary

You will mentor engineers, champion next-gen design methodologies, and drive on-time tape-outs while aligning with company strategy and cross-functional partners.

Qualifications

• 8+ years of progressively responsible back-end physical design and verification experience.
• Strong leadership experience, with a track record of scaling physical design teams.
• Deep expertise in hierarchical physical design strategies and flows.

Responsibilities

• Lead RTL-to-GDSII implementation across multiple SoC programs.
• Mentor and develop the physical design team, promoting innovation.
• Oversee schedules, resources, and risk to meet tape-out goals.
• Collaborate with design teams to influence key decisions.

Skills

Leadership

RTL to GDSII

Scripting (Python)

Communication

Team mentoring

Project management

Education

Electrical/Computer Engineering

Tools

EDA tools

Makefile

Tcl

Python

Perl

Job description

About the Company

We are a fast-growing semiconductor company specialising in VLSI and embedded systems, with operations spanning Singapore and ASEAN. Our team designs high-performance data processing chips and delivers high-quality ASIC design services, combining advanced technology with product innovation to build robust, value-driven solutions for information security applications. We also provide fast,efficient time-to-market SoC design services that help our partners accelerate product development and commercialisation.

We're looking for an experienced Physical Design Manager to lead and grow our ASIC/SoC physical design team.

The Role

As Physical Design Manager, you will set the long-term direction for our physical design organisation and own end-to-end RTL-to-GDSII implementation across complex SoC programs. You'll build and mentor a high-performing engineering team, champion next-generation design methodologies, and represent physical design in cross-functional and executive discussions — ensuring high-quality, on-time tape-outs that support the company's broader technology strategy.

What You'll Do

• Shape the long-term vision for physical design capabilities and infrastructure, in line with company-wide technology strategy


• Lead RTL-to-GDSII implementation across multiple SoC programs — covering synthesis, floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, and physical verification (DRC/LVS)


• Provide strategic and technical leadership to the physical design team, driving successful, on-time tape-outs for complex,high-performance SoCs


• Mentor and develop engineering talent, building a culture of innovation, collaboration, and continuous improvement


• Oversee team structure, hiring, performance management,and career development to build and retain a high-performing organisation


• Partner closely with design teams to influence key design decisions and ensure successful project execution


• Navigate and resolve cross-functional challenges,keeping teams aligned and projects moving


• Drive adoption of next-generation physical design methodologies, flows, and automation to lift productivity and design quality


• Manage project schedules, resources, and risk in line with business goals and customer requirements


• Represent the physical design function in cross-org and executive discussions, contributing to long-term technology and product strategy

What We're Looking For

• Bachelor's, Master's, or PhD in Electrical Engineering,Computer Engineering, or a related field


• 8+ years of progressive experience in back-end physical design and verification, including significant leadership experience


• A proven track record of leading and scaling physical design teams, managing complex SoC projects, and delivering high-quality tape-outs on aggressive schedules


• Deep expertise in hierarchical physical design strategies, methodologies, and advanced process node challenges


• Strong understanding of current design technologies used by major foundries


• Solid grasp of ASIC design flow, RTL integration,synthesis, and timing closure


• In-depth knowledge of modern EDA tools and flows


• Proficiency in automation and scripting (Makefile, Tcl, Python, or Perl) to improve design efficiency and flow robustness


• Strong communication skills, with the ability to influence cross-functional teams and executive stakeholders


• Experience developing and deploying advanced physical design methodologies and flows


• Familiarity with AI/ML-driven optimisation in physical design tools is a plus

What We Offer

• Competitive salary, commensurate with your qualifications and experience


• The chance to work on cutting-edge SoC/ASIC projects


• Strong technical mentorship and clear career growth


• Ownership of complex blocks and top-level implementation work


• Exposure to global semiconductor customers


• A professional, friendly, and supportive working environment


• Annual bonus, paid twice a year


• Annual performance reviews with clear growth and development conversations


• Premium insurance coverage for you and your family(spouse and children)


• Team-building activities, internal events, and company-wide engagement programmes