Layout Engineer – Semiconductor

INTELLIPRO SINGAPORE PTE. LTD.; Singapore; On-site; SGD 47,000 - 73,000; Full time

Job summary

INTELLIPRO SINGAPORE PTE. LTD. is seeking a detail-oriented Layout Engineer to join our semiconductor design team.

This role focuses on IC layout design, ensuring accuracy, performance, and manufacturability of integrated circuits. Fresh graduates with strong academic foundations in electrical/electronic engineering are welcome to apply. You will perform IC layout design for analog, digital, or mixed-signal circuits, collaborating with design engineers to translate schematics into optimized

Qualifications

• Diploma or degree in Electrical/Electronic Engineering.
• Knowledge of IC layout tools Cadence Virtuoso, Mentor Graphics, or Synopsys.
• Understanding of semiconductor device physics and circuit fundamentals.
• Fresh graduates with relevant coursework, projects, or internship experience encouraged.
• Good problem-solving and ability to work independently or in a team.

Responsibilities

• Perform IC layout design for analog, digital, or mixed-signal circuits.
• Work closely with design engineers to translate schematics into optimized layouts.
• Ensure compliance with design rules, DRC/LVS checks, and foundry requirements.
• Conduct layout verification, parasitic extraction, and optimization for performance and reliability.
• Prepare documentation and support design reviews.

Skills

IC layout

Semiconductor physics

Education

Diploma/Degree in Electrical/Electronic Engineering

Tools

Cadence Virtuoso

Mentor Graphics

Synopsys

Job description

About the Role

We are seeking a detail‑oriented Layout Engineer to join our semiconductor design team. This role focuses on IC layout design, ensuring accuracy, performance, and manufacturability of integrated circuits. Fresh graduates with strong academic foundations in electrical/electronic engineering are welcome to apply.

Key Responsibilities

• Perform IC layout design for analog, digital, or mixed‑signal circuits.


• Work closely with design engineers to translate schematics into optimized layouts.


• Ensure compliance with design rules, DRC/LVS checks, and foundry requirements.


• Conduct layout verification, parasitic extraction, and optimization for performance and reliability.


• Prepare documentation and support design reviews.

Requirements

• Diploma/Degree in Electrical/Electronic Engineering or related discipline.


• Knowledge of IC layout tools (Cadence Virtuoso, Mentor Graphics, Synopsys, or equivalent).


• Strong understanding of semiconductor device physics and circuit fundamentals.


• Fresh graduates with relevant coursework, projects, or internship experience are encouraged to apply.


• Good problem‑solving skills and ability to work independently or in a team environment.

Added Advantage

• Experience in analog/mixed‑signal layout or exposure to semiconductor fabrication processes.


• Familiarity with industry standards and EDA verification flows.

What We Offer

• Opportunity to work on cutting‑edge semiconductor projects.


• Mentorship and training for fresh graduates to build a strong career foundation.


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  Competitive salary package and career development opportunities.
  

  
  

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