Layout Engineer - Semiconductor

INTELLIPRO SINGAPORE PTE. LTD.; Singapore; On-site; SGD 39,000 - 58,000; Full time

Benefits offered by this job

Mentorship and training

Career development opportunities

Competitive salary package

Job summary

INTELLIPRO SINGAPORE PTE. LTD. is seeking a detail-oriented Layout Engineer to join our semiconductor design team in Singapore.

You will focus on IC layout design, ensuring accuracy, performance, and manufacturability of integrated circuits. Fresh graduates with strong academic foundations are welcome to apply. You will collaborate with design engineers to translate schematics into optimized layouts, perform DRC/LVS checks, and support layout verification and parasitic extraction for

Qualifications

• Bachelor’s or diploma in Electrical/Electronic Engineering with strong academic fundamentals.
• Fresh graduates encouraged to apply if they have relevant coursework or internship.
• Familiarity with IC layout tools and basic layout concepts is preferred.

Responsibilities

• Perform IC layout design for analog, digital, or mixed-signal circuits.
• Translate schematics into optimized layouts with design engineers.
• Ensure compliance with DRC/LVS checks and foundry requirements.

Skills

IC layout basics

problem solving

teamwork

Education

Diploma/Degree in Electrical/Electronic Engineering

Tools

Cadence Virtuoso

Mentor Graphics

Synopsys

Job description

About the Role

We are seeking a detail‑oriented Layout Engineer to join our semiconductor design team. This role focuses on IC layout design , ensuring accuracy, performance, and manufacturability of integrated circuits. Fresh graduates with strong academic foundations in electrical/electronic engineering are welcome to apply.

Key Responsibilities

• Perform IC layout design for analog, digital, or mixed‑signal circuits.
• Work closely with design engineers to translate schematics into optimized layouts.
• Ensure compliance with design rules, DRC/LVS checks, and foundry requirements .
• Conduct layout verification, parasitic extraction, and optimization for performance and reliability.
• Prepare documentation and support design reviews.

Requirements

• Diploma/Degree in Electrical/Electronic Engineering or related discipline.
• Knowledge of IC layout tools (Cadence Virtuoso, Mentor Graphics, Synopsys, or equivalent).
• Strong understanding of semiconductor device physics and circuit fundamentals .
• Fresh graduates with relevant coursework, projects, or internship experience are encouraged to apply.
• Good problem‑solving skills and ability to work independently or in a team environment.

Added Advantage

• Experience in analog/mixed‑signal layout or exposure to semiconductor fabrication processes .
• Familiarity with industry standards and EDA verification flows.

What We Offer

• Opportunity to work on cutting‑edge semiconductor projects.
• Mentorship and training for fresh graduates to build a strong career foundation.
• Competitive salary package and career development opportunities.

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