IC Layout Engineer — AMS Physical Design & Verification

WECRUIT PTE. LTD.; Singapore; On-site; SGD 60,000 - 90,000; Full time

Job summary

WECRUIT PTE. LTD. is seeking a layout engineer to develop and implement physical layouts from schematic designs for AMS applications. You will manage floor planning, device placement and routing in line with design requirements to deliver robust layouts.

You will optimize power and signal routing, perform physical verification (DRC/LVS/ERC), resolve layout violations, review completed layouts, and contribute to layout methodology improvements, supporting post-layout changes and IP activities.

Qualifications

• Experience in physical design for AMS layouts preferred.
• Strong knowledge of DRC, LVS and parasitic checks helpful.
• Familiarity with RC delay, decoupling capacitors and latch-up concepts.

Responsibilities

• Develop and implement physical layouts from schematic designs for AMS applications.
• Manage floor planning, device placement, and routing activities in accordance with design requirements.
• Optimize power and signal routing to support layout performance and integrity.
• Perform physical verification and analysis, including DRC, LVS, ERC, ANT, ESD, PERC, LVL, and other relevant checks.
• Identify and resolve layout violations while ensuring schematic-to-layout consistency.
• Review completed layouts and supporting materials to ensure quality and accuracy.
• Utilize layout checklists and established methodologies to maintain design standards.
• Contribute to the enhancement of layout methodologies, processes, and best practices.
• Support post-layout changes as well as block-level and IP-related activities.
• Apply fundamental knowledge of AMS layout, EM/IR, RC delay, decoupling capacitors, latch-up, and related physical design concepts.

Job description

WECRUIT PTE. LTD. is seeking a layout engineer to develop and implement physical layouts from schematic designs for AMS applications. You will manage floor planning, device placement and routing in line with design requirements to deliver robust layouts.

You will optimize power and signal routing, perform physical verification (DRC/LVS/ERC), resolve layout violations, review completed layouts, and contribute to layout methodology improvements, supporting post-layout changes and IP activities.