Custom Layout Engineer — Analog/RFIC, PPA Optimized

PERSOL SINGAPORE PTE. LTD.; Singapore; On-site; SGD 54,000 - 89,000; Full time

Job summary

PERSOL SINGAPORE PTE. LTD. is seeking a Custom Layout Engineer to support the physical implementation of Foundation IP, Analog IP, and RFIC designs across advanced CMOS processes.

The role covers full-chip layout development, physical verification, and optimization for power, performance and area (PPA). You will perform IO/ESD, Analog and RF layout, handle floorplanning, layout construction, DRC/LVS/ERC checks, and collaborate with design and verification teams to ensure timely delivery of

Qualifications

• Bachelor's degree in Electrical/Electronic Engineering or related discipline.
• 3+ years of experience in custom layout, analog layout, RFIC, or Foundation IP design.
• Hands-on experience with advanced CMOS technologies (FinFET and/or GAA).
• Proficiency in Cadence and/or Synopsys layout and verification tools.
• Strong understanding of DRC, LVS, ERC, ESD, SI/PI, EM/IR, and DFM concepts.

Responsibilities

• Perform custom layout implementation for IO/ESD, Analog, and RF circuits.
• Handle floorplanning, layout construction, physical verification, and sign-off activities.
• Conduct DRC, LVS, ERC, and other verification checks to ensure design quality.
• Collaborate with design, verification, and cross-functional teams to optimize layouts.
• Support project execution and provide regular status updates to stakeholders.
• Ensure timely delivery of high-quality layouts across multiple technology nodes.

Skills

Custom layout

Analog layout

RFIC design

Foundation IP

Education

Bachelor's degree in Electrical Engineering

Tools

Cadence

Synopsys

Job description

PERSOL SINGAPORE PTE. LTD. is seeking a Custom Layout Engineer to support the physical implementation of Foundation IP, Analog IP, and RFIC designs across advanced CMOS processes.

The role covers full-chip layout development, physical verification, and optimization for power, performance and area (PPA). You will perform IO/ESD, Analog and RF layout, handle floorplanning, layout construction, DRC/LVS/ERC checks, and collaborate with design and verification teams to ensure timely delivery of