IC Layout Engineer — Advanced Node, Cadence Virtuoso

AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; Singapore; On-site; SGD 70,000 - 110,000; Full time

Job summary

Broadcom Inc. in Singapore is seeking an experienced IC layout engineer to deliver high-quality layouts for Standard Cells, I/O pads and Mixed-Signal IP across advanced nodes.

You will work with designers across sites, use Cadence Virtuoso and Calibre for layout, DRC/LVS checks, and contribute to process rule interpretation and layout optimization. The ideal candidate holds a Bachelor's in Electronic Engineering and 3–4+ years of hands-on IC layout experience, with scripting skills in Shell,

Qualifications

• Bachelor's degree in Electronic Engineering is required.
• 3–4+ years of hands-on IC layout experience required.
• Scripting knowledge in Shell, Python, Tcl or Cadence SKILL is required.

Responsibilities

• Apply design guidelines and rules to deliver high-performance layouts.
• Manage layout schedules from transistor level to floorplanning.
• Adopt new layout methodologies to improve quality and efficiency.
• Collaborate with engineers across sites to ensure alignment.
• Use Cadence Virtuoso to create and verify layouts.
• Perform DRC/LVS/ERC/Antennas/EM/IR checks with Calibre.
• Apply knowledge of ESD and latch-up to I/O design.

Skills

IC layout

Layout automation

Education

Bachelor’s degree in Electronic Engineering

Tools

Cadence Virtuoso

Calibre

Shell

Python

Tcl

Cadence SKILL

Job description

Broadcom Inc. in Singapore is seeking an experienced IC layout engineer to deliver high-quality layouts for Standard Cells, I/O pads and Mixed-Signal IP across advanced nodes.

You will work with designers across sites, use Cadence Virtuoso and Calibre for layout, DRC/LVS checks, and contribute to process rule interpretation and layout optimization. The ideal candidate holds a Bachelor's in Electronic Engineering and 3–4+ years of hands-on IC layout experience, with scripting skills in Shell,