HBM Validation Senior Staff Engineer

MICRON SEMICONDUCTOR ASIA OPERATIONS PTE LTD; Singapore; Vor Ort; SGD 180.000 - 280.000; Vollzeit

Zusammenfassung

Micron Technology, Inc. in Singapore seeks an experienced Validation Engineer to lead end-to-end validation in a high‑tempo environment.

You will own data pipelines, generate actionable reports, and ensure MBIST and timing coverage while coordinating with global teams across platforms like SM3/Cobra and Advantest V93K. You will develop test programs, optimize cycle time, and mentor junior engineers, contributing to silicon improvements and process automation within a cutting-edge memory

Qualifikationen

• 8+ years in DRAM/HBM/NAND validation or product engineering.
• 2+ years of HBM validation experience.
• Test platform code development in C/C++, Python, and APG.

Aufgaben

• Lead end-to-end validation Run execution in a high‑pressure, fast‑paced environment with on-schedule starts/completions and risk-aware re-plans.
• Own time-bound data crunching pipelines and deliver decision-ready summaries and sightings by agreed Cycle Time.
• Guarantee coverage across MBIST and flows; drive hot/cold corners, TSV screen/AQLK, async timing boundary coverage, and evidence-backed closure.
• Develop and debug test programs on SM3/Cobra and Advantest V93K; enforce code quality, reviews, and release discipline.
• Align hardware configs to test intent and throughput targets.
• Architect and execute Verilog simulations to replicate platform sightings and de-risk content changes before deployment.
• Build automation scripts and dashboards for anomaly detection, trend analysis, and coverage auditing.
• Lead silicon debug across Design, Verification, Quality, and System Engineering; drive root-cause closure.

Kenntnisse

DRAM validation

HBM validation

C/C++

Python

Verilog simulation

ValRuns / high-speed I/O

Ausbildung

Bachelor’s or Master’s in Electrical/Computer Engineering

Tools

MBIST (SM3/Cobra)

Advantest V93K

Git/Perforce

Confluence/Jira

Jobbeschreibung

Micron Technology, Inc. in Singapore seeks an experienced Validation Engineer to lead end-to-end validation in a high‑tempo environment.

You will own data pipelines, generate actionable reports, and ensure MBIST and timing coverage while coordinating with global teams across platforms like SM3/Cobra and Advantest V93K. You will develop test programs, optimize cycle time, and mentor junior engineers, contributing to silicon improvements and process automation within a cutting-edge memory