FPGA & SoC RTL Design Engineer (Full-Chip)

AMD; Singapore; Vor Ort; SGD 120.000 - 180.000; Vollzeit

Benefits dieser Stelle

AMD benefits

Zusammenfassung

AMD in Singapore is seeking a highly capable RTL digital design engineer to join the FPGA Product Development Silicon Integration team. You will integrate RTL components from multiple design groups into next‑gen FPGA and programmable SoC products, build Full‑Chip RTL connectivity models, and verify they meet architectural intent.

The ideal candidate has hands-on experience with Verilog/SystemVerilog, ASIC/SoC design flows, and strong scripting and tooling skills.

Qualifikationen

• Strong RTL design experience with Verilog/SystemVerilog.
• Experience integrating IP blocks into full‑chip designs.
• Familiarity with ASIC design flow and verification.
• Excellent collaboration and communication across global teams.

Aufgaben

• Develop Full-Chip SoC RTL.
• Write Full-Chip Design Specification documents.
• Work with IP development teams to integrate IP components.
• Work across Architecture, Software, and Verification teams to assure Full-Chip SoC RTL quality.
• Run lint and other static verification tools.

Kenntnisse

FPGA experience

SoC architectures

ASIC design flow

Verilog/SystemVerilog

VCS

Verdi

Design Compiler

Primetime

Spyglass

Lint

Conformal

CDC/RDC tools

Perforce

Unix/Linux scripting

Ausbildung

Bachelor's or Master's in Electrical/Computer Engineering

Jobbeschreibung

AMD in Singapore is seeking a highly capable RTL digital design engineer to join the FPGA Product Development Silicon Integration team. You will integrate RTL components from multiple design groups into next‑gen FPGA and programmable SoC products, build Full‑Chip RTL connectivity models, and verify they meet architectural intent.

The ideal candidate has hands-on experience with Verilog/SystemVerilog, ASIC/SoC design flows, and strong scripting and tooling skills.