Foundation IP Memory Verification Engineer

AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; Singapore; On-site; SGD 100,000 - 180,000; Full time

Job summary

AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED is seeking design engineers to join our Central Engineering Group to develop foundation IP for AI products, including memory compilers and memory cells. We have multiple positions at all experience levels.

Ideal candidates will have strong memory circuit design expertise, transistor-level verification skills, and proficiency in scripting to automate flows, with excellent collaboration and problem-solving abilities to thrive in a fast-paced team.

Qualifications

• Bachelor Electronics or computer engineering graduates with minimum 5 years of memory circuit related experience.
• Strong memory circuit design and transistor level verification experience.
• Experience with memory behavior and physical models is a plus.

Responsibilities

• Contribute towards Memory Design Validation of custom memory macros and memory compilers.
• Perform functional verification and help resolve design discrepancies.
• Conduct signal integrity analysis and propose solutions to design weaknesses.
• Perform transistor level simulations to verify timing and margins.
• Develop automation scripts to streamline verification workflows.
• Collaborate with memory designers to improve validation flow and plan.

Skills

Transistor level understanding

Signal integrity analysis

Automation scripting

Memory circuit design

DFT knowledge

Communication & leadership

Education

Bachelor's degree in Electronics or Computer Engineering

Tools

Cadence tools

SPICE modelling

Verilog-AMS / Verilog

Job description

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

• Contribute towards Memory Design Validation of all types of custom memory macros and memory compilers
  

• Perform functional verification, root cause design discrepancies, and help resolve them
  

• Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them
  

• Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them
  

• Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins
  

• Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them
  

• Perform various QA and validation checks to ensure accurate timing and power models
  

• Develop scripts to automate verification flow and data analysis
  

• Support silicon debugs and correlation to spice models
  

• Collaborate with key memory designers to co-develop and improve the memory characterization and validation flow
  

• Coordinate with memory design leads, modelling leads, and managers to define and execute on the memory validation plan
  

Preferred Skills

• Good understanding of transistor level circuit behavior and device physics
  

• Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
  

• Proficiency in running simulators, writing automation scripts, and are tools savvy
  

• Understanding of memory behavioral and physical models is a plus
  

• Expertise in memory circuit design is a plus
  

• Understanding of DFT schemes and chip level integration is a plus
  

• Good communication, interpersonal, and leadership skills
  

• Motivated, self-driven and good at multi-tasking
  

• Passion for solving complex problems and willingness to learn
  

Qualifications

Bachelor Electronics or computer engineering graduates with minimum 5 years of memory circuit related experience