Foundation IP Memory Verification Engineer

Avago Technologies Intl' Sales Pte Ltd; Singapore; On-site; SGD 90,000 - 150,000; Full time

Job summary

Avago Technologies Intl' Sales Pte Ltd is seeking energetic design engineers to join our Central Engineering Group. You will develop foundation IP for AI products including memory compilers, logic cells, and custom macros, across advanced process technology.

Multiple positions available at all experience levels. Responsibilities span memory design validation, functional verification, timing and power modeling, script automation, silicon debug support, and collaboration with memory design teams

Qualifications

• Bachelor's degree in Electronics or Computer Engineering with at least 5 years in memory circuits.
• Strong understanding of transistor-level behavior and device physics.
• Experience with memory models, verification, and timing analysis.

Responsibilities

• Contribute towards Memory Design Validation of custom memory macros and memory compilers.
• Perform functional verification, root cause design discrepancies, and help resolve them.
• Perform signal integrity analysis, identify design weaknesses, and propose solutions.
• Perform transistor level simulations to check for Power Up or Lock up issues and help resolve them.
• Perform EM/IR analysis and evaluate impact on timing and internal margins.
• Validate timing and internal margins, identify timing characterization holes, and help resolve them.
• Conduct QA and validation checks to ensure accurate timing and power models.
• Develop scripts to automate verification flow and data analysis.
• Support silicon debugs and correlation to spice models.
• Collaborate with memory designers to co-develop validation flow and memory characterization.
• Coordinate with memory design leads and managers to define and execute validation plans.

Skills

Transistor level circuit behavior

Signal integrity analysis

Automation scripting

Memory circuit design

DFT knowledge

Chip level integration

Communication and leadership

Multi-tasking

Problem solving

Education

Bachelor Electronics or Computer Engineering

Tools

Verilog/VHDL simulators

EDA tools

Automation scripting (Python/TCL)

Job description

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

• Contribute towards Memory Design Validation of all types of custom memory macros and memory compilers
  

• Perform functional verification, root cause design discrepancies, and help resolve them
  

• Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them
  

• Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them
  

• Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins
  

• Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them
  

• Perform various QA and validation checks to ensure accurate timing and power models
  

• Develop scripts to automate verification flow and data analysis
  

• Support silicon debugs and correlation to spice models
  

• Collaborate with key memory designers to co-develop and improve the memory characterization and validation flow
  

• Coordinate with memory design leads, modelling leads, and managers to define and execute on the memory validation plan
  

Preferred Skills

• Good understanding of transistor level circuit behavior and device physics
  

• Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
  

• Proficiency in running simulators, writing automation scripts, and are tools savvy
  

• Understanding of memory behavioral and physical models is a plus
  

• Expertise in memory circuit design is a plus
  

• Understanding of DFT schemes and chip level integration is a plus
  

• Good communication, interpersonal, and leadership skills
  

• Motivated, self-driven and good at multi-tasking
  

• Passion for solving complex problems and willingness to learn
  

Qualifications

Bachelor Electronics or computer engineering graduates with minimum 5 years of memory circuit related experience