Dry Etch - SMTS, PD, Advance NAND

1100 Micron SemiAsiaOP Pte Ltd; Singapore; On-site; SGD 100,000 - 130,000; Full time

Job summary

1100 Micron SemiAsiaOP Pte Ltd in Singapore is seeking a Senior Member of Technical Staff to lead dry etch process development for NAND technologies. The role involves innovation and collaboration with various teams to meet program goals.

Candidates should have 12-15 years of relevant experience in dry etch processes, deep knowledge of plasma technology, and a strong educational background, preferably a PhD. This position emphasizes mentorship and technical leadership in a cutting-edge environment.

Qualifications

• 12-15 years’ experience in dry etch process development.
• 7-10 years specifically in memory products such as NAND and DRAM.
• Experience in managing technical projects.

Responsibilities

• Lead Dry Etch technology and module development.
• Develop and innovate dry etch processes.
• Mentor MTS engineers and interns on technical problem solving.

Skills

Research and development aptitude

Leadership in problem solving

Expertise in statistical process control

Strong computer skills

Plasma physics knowledge

Education

PhD in relevant fields

Tools

MS Office

SAS software (e.g., JmP)

Job description

Position Overview

As a Senior Member of Technical Staff (SMTS) – Dry Etch Engineer, you will define, develop, and transfer advanced dry etch processes for Micron NAND technologies. You will work directly with process integration and other process areas such as Wet Etch, CVD, Diffusion, Metals, Lithography, and CMP, and you will own the roadmap to meet program and yield goals for next‑generation NAND.

Responsibilities

• Lead Dry Etch technology and critical module development, owning key NAND dry etch process levels and modules, translating technology challenges into executable roadmaps for current and future nodes.
• Serve as the primary Dry Etch representative in program and module meetings for owned process areas.
• Drive multi‑functional execution across Technology Development, Process Integration, and Manufacturing.
• Develop and innovate dry etch processes to meet structural and electrical specifications for advanced NAND devices.
• Lead first‑of‑a‑kind (FOAK) dry etch process development, including recipe architecture, EPD strategy, control plans, and integration alignment.
• Establish tool redundancy, run‑to‑run controls, and E3 monitors to improve process robustness and manufacturability.
• Independently meet process maturity, CSPEC, SPC, and qualification criteria and timelines for owned process levels.
• Provide clear technical status and risk updates to program stakeholders.
• Collaborate with equipment and supplier teams to define and implement process‑level hardware roadmaps.
• Apply model‑based and data‑driven problem solving to resolve complex yield, defectivity, and integration issues.
• Contribute toward Technical Leadership Program, including technical leadership and development.
• Act as a recognized technical expert within Dry Etch for owned process areas.
• Mentor MTS engineers, interns, and early‑career staff on technical problem solving, data analysis, and plasma etch fundamentals.
• Participate in Micron patent programs, technical seminars, and knowledge‑sharing forums.
• Continuously develop technical breadth and depth in dry etch technology and adjacent process areas.
• Demonstrate solid presentation skills in executive meetings, presenting process and technology roadmaps for current and future technology nodes.
• Influence other process areas’ technology roadmaps.

Qualifications

• Demonstrated aptitude for research and development, with 12‑15 years’ experience in dry etch process development in R&D (NAND, DRAM, or Logic) transferring to manufacturing.
• 7‑10 years of experience specifically in memory products such as NAND and DRAM.
• In‑depth knowledge of plasma physics, plasma chemistry, transport or surface phenomena gained through experience and/or coursework.
• Demonstrated leadership in problem solving.
• Experience in managing technical projects.
• Understanding of various types of plasma dry etch reactors (e.g., RF sources, chemistries).
• Expertise in statistical process control and analysis.
• Experience in solving scalability problems of deep high aspect‑ratio silicon/dielectric etches with a fundamental understanding of advanced conventional and unconventional (tailored) pulsing schemes.
• Proven ability to independently drive technical execution and influence multi‑functional teams.
• Strong computer skills, including MS Office, and SAS software such as JmP and similar.
• AI development and coding capability is preferred.

Education

• PhD in Chemical, Mechanical, Electrical, Materials Science, Physics, Chemical Physics, Chemistry, Semiconductor Engineering, or related majors, with at least 12 years of relevant dry etch process development experience.
• BS/MS in the same fields, with at least 15 years of relevant dry etch process development experience.

EEO Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. Micron prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any payment from candidates as consideration for employment.