Digital IC Design Engineer

ZERRO POWER SYSTEMS PTE. LTD.; Singapore; On-site; SGD 50,000 - 80,000; Full time

Job summary

A leading technology company in Singapore is seeking a digital circuit designer to create and verify RTL-level designs. You will collaborate with backend teams and ensure proper digital synthesis and timing analysis for mixed-signal ICs. Required qualifications include a Bachelor's or Master's degree in Electronics or Electrical Engineering, along with 2-3 years of experience in digital design validation. Familiarity with Verilog and Cadence tools is crucial for success in this role.

Qualifications

• Minimum 2-3 years of experience in application and validation of digital designs.
• Knowledge of design, simulation, and verification methodologies.
• Basic understanding of logic synthesis and static timing analysis.

Responsibilities

• Design RTL-level digital circuits for synchronous and asynchronous applications.
• Perform digital functional verification and FPGA verification.
• Collaborate with backend teams for digital synthesis and timing analysis.
• Troubleshoot design and verification issues.
• Support verification activities with test plans and simulations.

Skills

Verilog coding

Digital functional verification

FPGA verification

Troubleshooting IC design

Education

Bachelor’s or Master’s degree in Electronics or Electrical Engineering

Tools

Cadence tools

Incisive Enterprise Simulator

SimVision

Genus

First Encounter

Conformal

Modus

Tempus

Virtuoso

Job description

Company Overview

Zerro Power Systems Pte. Ltd. began in 2017, specializing in motor controller solutions. The team comprises experts with over 30 years of experience in circuit design across diverse applications.

Job Summary

Design and verify RTL-level digital circuits, collaborate with backend teams on synthesis and timing, and perform functional and FPGA verification to ensure robust mixed-signal IC designs.

Responsibilities

• Design RTL-level digital circuits for synchronous and asynchronous applications involving multiple clock domains to meet functional requirements
• Perform digital functional verification and FPGA verification to validate design correctness and performance
• Collaborate with backend teams to execute digital synthesis, place-and-route, design for test, and static timing analysis for optimized chip implementation
• Troubleshoot and resolve design and verification issues to ensure reliable IC functionality
• Support function verification activities by developing and executing test plans and simulations

Required competencies and certifications

• Bachelor’s or Master’s degree in Electronics or Electrical Engineering
• Minimum 2-3 years of experience in application and validation of digital designs
• Knowledge of Verilog coding, design, simulation, and verification methodologies
• Basic understanding of logic synthesis, place-and-route, static timing analysis, and logic equivalency checking

Preferred competencies and qualifications

• Experience using Cadence tools such as Incisive Enterprise Simulator, SimVision, Genus, First Encounter, Conformal, Modus, Tempus, and Virtuoso