DFT Engineer – SoC Test & Validation (Singapore)

ByteDance; Singapore; On-site; SGD 78,000 - 134,000; Full time

Job summary

ByteDance's Silicon Platform Team acts as the core R&D middleware group for chip development, covering the full chip design flow from Synthesis to tape-out and mass production. The role focuses on DFT-related work in SoC chips and requires strong scripting and DFT tool experience.

You will collaborate with STA, physical design, and power engineers to resolve Timing/Power-IR issues and work with test engineers to validate silicon test vectors, ensuring successful testing and deployment.

Qualifications

• Master's degree or above, majoring in Microelectronics, Electronics, Computer Science or related fields, with more than 2 years of DFT work experience.
• Proficient in scripting skills (such as TCL, Perl, Python, etc.).
• Skilled in using DFT EDA tools and mastering DFT principles and methods.

Responsibilities

• Responsible for DFT-related work in SoC chips, including Scan, MBIST, ATPG, Boundary Scan, IP test etc.
• Collaborate closely with STA, physical design, and power engineers to debug and resolve DFT-related Timing/Power-IR problems.
• Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing.

Skills

Scripting (TCL/Python)

DFT knowledge

DFT principles & methods

Education

Master's degree in Microelectronics

Related field degree

Tools

DFT EDA tools

Job description

ByteDance's Silicon Platform Team acts as the core R&D middleware group for chip development, covering the full chip design flow from Synthesis to tape-out and mass production. The role focuses on DFT-related work in SoC chips and requires strong scripting and DFT tool experience.

You will collaborate with STA, physical design, and power engineers to resolve Timing/Power-IR issues and work with test engineers to validate silicon test vectors, ensuring successful testing and deployment.