Senior Digital Design Engineer - RTL, FPGA & ASIC Lead

Movandi Corporation; Riyadh; In loco; SAR 299.962 - 374.953; Tempo pieno

Descrizione del lavoro

Movandi Corporation is seeking an experienced Digital Design Engineer to lead complex digital subsystems within their hardware team in Riyadh, Saudi Arabia. The successful candidate will have 5–10 years of industry experience in digital IC or FPGA design, demonstrating leadership in RTL design and a clear understanding of synchronous design principles.

This role requires close collaboration with embedded software and verification engineers, focusing on robust design deliveries. Proficiency in SystemVerilog and VHDL, along with validation and timing closure expertise, is essential to contribute effectively to high-performance projects.

Competenze

• 5–10 years of experience in digital IC or FPGA design with a successful track record.
• Proficiency in SystemVerilog and VHDL, with a focus on reusable design.
• Expertise in synchronous design principles and verification using SystemVerilog.

Mansioni

• Lead design and verification of digital subsystems for FPGA and ASIC.
• Drive microarchitecture decisions and timing closure for complex designs.
• Mentor junior engineers and improve team processes.

Conoscenze

SystemVerilog

VHDL

Python

Tcl

Git

Strumenti

Xilinx Vivado

Cadence Genus

Cadence Xcelium

Descrizione del lavoro

Movandi Corporation is seeking an experienced Digital Design Engineer to lead complex digital subsystems within their hardware team in Riyadh, Saudi Arabia. The successful candidate will have 5–10 years of industry experience in digital IC or FPGA design, demonstrating leadership in RTL design and a clear understanding of synchronous design principles.

This role requires close collaboration with embedded software and verification engineers, focusing on robust design deliveries. Proficiency in SystemVerilog and VHDL, along with validation and timing closure expertise, is essential to contribute effectively to high-performance projects.