FinFET Analog Layout Engineer - Hybrid & Growth

Capgemini Engineering; Porto; Híbrido; EUR 45 000 - 65 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Hybrid work

Health and life insurance

Referral program

Training and certifications

Career growth

Resumo da oferta

Capgemini Engineering in Porto, Portugal is seeking an experienced Analog Layout Engineer specializing in FinFET technology. You will design and optimize analog layouts for advanced nodes, ensuring DRC/LVS compliance and focusing on performance, reliability, and manufacturability.

Responsibilities include layout for amplifiers, references, bias blocks, and data converters; applying EM/IR analysis, minimizing parasitics, and collaborating with circuit designers to maximize yield.

Qualificações

• 5+ years of hands-on FinFET layout experience.
• Strong knowledge of LDE effects (WPE, STI, LOD).
• Proficiency in Cadence Virtuoso, Calibre, and PVS.
• Experience with parasitic extraction flows and correlations.
• Understanding of reliability mechanisms (BTI, HCI).
• Experience with advanced-node design rules and color-aware layout.
• Knowledge of EM/IR verification methodologies and sign-off.
• Ability to automate layout tasks with SKILL or Python.

Responsabilidades

• Develop analog layouts for circuits such as amplifiers, references, bias blocks and data converters in FinFET nodes
• Apply best practices for DRC/LVS closure, including advanced tips and tricks for efficient debugging
• Perform EM/IR analysis and implement layout changes to meet reliability targets
• Address parasitic effects through careful routing, shielding, and post-extraction corrections
• Implement matching techniques (common-centroid, interdigitation, dummy devices) for precision circuits
• Collaborate with circuit designers to optimize layout for performance and yield.

Conhecimentos

Analog layout

FinFET

DRC/LVS

EM/IR analysis

Python scripting

Cadence Virtuoso

Calibre

PVS

Color-aware routing

Collaboration

Descrição da oferta de emprego

Capgemini Engineering in Porto, Portugal is seeking an experienced Analog Layout Engineer specializing in FinFET technology. You will design and optimize analog layouts for advanced nodes, ensuring DRC/LVS compliance and focusing on performance, reliability, and manufacturability.

Responsibilities include layout for amplifiers, references, bias blocks, and data converters; applying EM/IR analysis, minimizing parasitics, and collaborating with circuit designers to maximize yield.