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Capgemini Engineering is seeking an experienced Analog Layout Engineer in Portugal to design and implement analog layouts for FinFET nodes. You will ensure design rule compliance, optimize for performance, reliability, and manufacturability, and collaborate with circuit designers.
The role requires 5+ years in FinFET layout, proficiency with Cadence Virtuoso, Calibre, and PVS, and a strong grasp of EM/IR analysis. Hybrid work is offered along with health insurance and professional growth.
CAPGEMINI ENGINEERING At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.
We are seeking an experienced Analog Layout Engineer with strong expertise in FinFET technology. The candidate will design and implement analog layouts for advanced nodes, ensuring compliance with design rules and optimizing for performance, reliability, and manufacturability.
Capgemini is an AI-powered global business and technology transformation partner, delivering tangible business value. We imagine the future of organizations and make it real with AI, technology and people. With our strong heritage of nearly 60 years, we are a responsible and diverse group of 420,000 team members in more than 50 countries. We deliver end-to-end services and solutions with our deep industry expertise and strong partner ecosystem, leveraging our capabilities across strategy, technology, design, engineering and business operations.