GaN Power Package Engineer — Lead Design & Reliability

Navitas Semiconductor Usa, Inc.; Manila; On-site; PHP 1,200,000 - 2,400,000; Full time

Job summary

Navitas Semiconductor Usa, Inc. in Manila seeks a senior Package Engineer to lead GaN package design efforts and risk assessment with global teams. You will drive BOM, Process-of-records, and assembly validation while collaborating with OSAT partners to ensure reliability.

The ideal candidate has 15+ years in package design, strong knowledge of power device physics, SiC/GaN technologies, and proven leadership across cross-functional projects.

Qualifications

• Bachelor's or MS in Semiconductor Engineering, Materials Science, Chemical Engineering, or related field.
• At least 15 years experience in Package design and development.
• Strong understanding of power semiconductor device physics and manufacturing processes.
• Experience with SiC and/or GaN technologies preferred.
• Deep working knowledge of SPC, DOE, Cpk/Ppk analysis, FMEA, control plans, root-cause analysis, and yield analytics.
• Proven experience leading engineering projects and mentoring technical teams.
• Excellent communication skills with the ability to collaborate across global, cross-functional organizations.

Responsibilities

• Initiates the internal assembly design of the GaN device, BOM & Process flow in a target package footprint.
• Prepared preliminary Build diagram and Package Outline Drawings.
• Conducts risk assessment and identification of mitigating actions to eliminate or reduce the risks. This will be in collaboration with OSAT development team and Navitas Operations/NPI teams
• Works with Simulation engineer for thermal and thermo-mechanical stress simulations as part of risk assessment of new designs.
• Lead cross-functional team reviews to finalize proposed design
• Defines new assembly package layout rules as reference for future designs
• Drives all assembly validation activities to freeze Design-, BOM- and Process-of-records
• Performs Learning Cycle builds to validate design and material selection versus target performance
• Works with Rel team to execute Look-ahead reliability evaluations and post-stress construction analysis to assess package robustness
• Oversees the assembly of Final POR Qualification Lots at OSAT up to delivery of samples for Reliability testing
• Compiles and provides all relevant documentation under Package Engineering deliverables as per Navitas New Product Development Process

Skills

GaN device design

BOM & process flow

Cross-functional leadership

Thermal stress sims

Root cause analysis

CPK/DOE/FMEA

Mentoring teams

Strong communication

Education

Bachelor's degree in Semiconductor Engineering

MS degree in Materials Science or related field

Tools

2D CAD

FEA software

Job description

Navitas Semiconductor Usa, Inc. in Manila seeks a senior Package Engineer to lead GaN package design efforts and risk assessment with global teams. You will drive BOM, Process-of-records, and assembly validation while collaborating with OSAT partners to ensure reliability.

The ideal candidate has 15+ years in package design, strong knowledge of power device physics, SiC/GaN technologies, and proven leadership across cross-functional projects.