GaN Package Development Engineer

Navitas Semiconductor Usa; Muntinlupa; On-site; PHP 1,200,000 - 1,800,000; Full time

Job summary

Navitas Semiconductor Usa in Manila is seeking a senior Package Development Engineer to lead assembly design, BOM and process flow for GaN devices, collaborating with OSAT and Navitas teams. You will drive risk assessment, design validation, and reliability evaluations, oversee POR qualifications, and generate comprehensive package engineering deliverables for new product development.

The role requires 15+ years in package design and strong knowledge of power device physics, with preferred

Qualifications

• Bachelor's or MS in a related technical field.
• At least 15 years experience in package design and development.
• Strong understanding of power semiconductor device physics and manufacturing processes.
• Experience with SiC and/or GaN technologies preferred.
• Proven leadership in engineering projects and mentoring teams.

Responsibilities

• Initiates internal assembly design of GaN device, BOM & Process flow.
• Prepares preliminary Build diagram and Package Outline Drawings.
• Conducts risk assessment with mitigation actions in collaboration with OSAT and Navitas teams.
• Collaborates with Simulation engineer for thermal/thermo-mechanical stress simulations.
• Leads cross-functional reviews to finalize proposed designs.

Skills

Power device physics

Risk assessment

Cross-functional leadership

Documentation

Communication

Project mentoring

Process control

Quality analytics

Education

Bachelor's or MS in Semiconductor Eng./Materials Science/Chemical Eng.

Tools

2D CAD

Job description

Job DetailsJob Location: Manila, AlabangKey Responsibilities and Duties

Design & Risk Assessment

• Initiates the internal assembly design of the GaN device, BOM & Process flow in a target package footprint
• Prepared preliminary Build diagram and Package Outline Drawings.
• Conducts risk assessment and identification of mitigating actions to eliminate or reduce the risks. This will be in collaboration with OSAT development team and Navitas Operations/NPI teams
• Works with Simulation engineer for thermal and thermo-mechanical stress simulations as part of risk assessment of new designs.
• Lead cross-functional team reviews to finalize proposed design
• Defines new assembly package layout rules as reference for future designs

Package Development

• Drives all assembly validation activities to freeze Design-, BOM- and Process-of-records
• Performs Learning Cycle builds to validate design and material selection versus target performance
• Works with Rel team to execute Look-ahead reliability evaluations and post-stress construction analysis to assess package robustness
• Oversees the assembly of Final POR Qualification Lots at OSAT up to delivery of samples for Reliability testing
• Compiles and provides all relevant documentation under Package Engineering deliverables as per Navitas New Product Development Process

Customer Support

• Generates Engineering build requests for customer samples requested by BU
• Monitors assembly CTQs and yield performance of customer sample lots for CPK and yield analysis
• Generates Application notes for new packages to provide guidance for optimum board mount conditions of Navitas products.

Qualifications

• Bachelors degree or MS degree in Semiconductor Engineering, Materials Science, Chemical Engineering or a related technical field.
• At least 15 years experience in Package design and development
• Strong understanding of power semiconductor device physics and manufacturing processes.
• Experience with SiC and/or GaN technologies preferred.
• Deep working knowledge of SPC, DOE, Cpk/Ppk analysis, FMEA, control plans, root-cause analysis, and yield analytics.
• Proven experience leading engineering projects and mentoring technical teams.
• Excellent communication skills with the ability to collaborate effectively across global, cross-functional organizations.

Preferred Qualifications

• Package design using 2D CAD
• Understanding of FEA simulation techniques, reliability qualification standards, failure-analysis methodologies, and process excursion management.
• Experience in new assembly technologies for advanced power devices (ie flipchip, clip attach, Ag sinter, etc)
• Experience in leading or coordinating geographically distributed engineering teams.