Senior Verification Engineer, MEMS Timing ICs

SiTime; Rijswijk; On-site; EUR 70,000 - 90,000; Full time

Job summary

A technology company is seeking a Sr. Engineer, Verifications to develop MEMS timing ICs. The successful candidate will have substantial experience in verification, preferably in the semiconductor industry, and be skilled in SystemVerilog and UVM. This role involves developing verification models and communicating with cross-functional teams to ensure quality and innovation. Competitive compensation and bonuses are offered.

Qualifications

• 5 years experience in verification in the semiconductor industry.
• Good communication skills in English.
• Proficient in SystemVerilog and OOP.

Responsibilities

• Develop SV-RNM models for analog and mixed-signal circuits.
• Create verification plans from specifications.
• Run simulations and debug results.

Skills

SystemVerilog

Scripting languages (Perl/Python)

UVM verification

SystemVerilog Assertions (SVA)

Cadence Virtuoso

Digital design understanding (Verilog)

Communication skills

Education

MS degree in electrical/computer engineering

Job description

A technology company is seeking a Sr. Engineer, Verifications to develop MEMS timing ICs. The successful candidate will have substantial experience in verification, preferably in the semiconductor industry, and be skilled in SystemVerilog and UVM. This role involves developing verification models and communicating with cross-functional teams to ensure quality and innovation. Competitive compensation and bonuses are offered.