Senior FPGA Engineer for Quantum Control (Delft)

IC Resources; Zuid-Holland; On-site; EUR 90,000 - 120,000; Full time

Job summary

IC Resources is seeking a Senior FPGA Engineer in Delft to drive FPGA design for quantum control systems. You will develop RTL in VHDL, create self-checking testbenches, and contribute to UVM environments while collaborating with cross-functional teams in a research and industrial setting.

Ideal candidates have 5+ years FPGA experience, proficiency with VHDL, and hands-on experience with Xilinx Vivado or Intel Quartus, QuestaSim, and Git-based development. Knowledge of AXI/Avalon buses is a plus.

Qualifications

• 5+ years FPGA design experience within an R&D environment.
• Strong RTL development using VHDL.
• Experience with Xilinx Vivado or Intel Quartus.
• Strong module-level verification experience.
• Knowledge of simulation tools such as QuestaSim.
• Understanding of processor and bus architectures including AXI or Avalon.
• Scripting experience with Python, TCL or Shell.
• Experience with Git-based development.
• Experience with Zynq, UltraScale+, RFSoC, SystemVerilog, UVM, DSP, timing closure, C/C++, Linux would be advantageous.

Responsibilities

• Develop RTL in VHDL and self-checking testbenches.
• Contribute to wider UVM environments and verification environments.
• Take ownership of complex design problems and architectural decisions.
• Collaborate with FPGA, embedded software, electronics, and scientific teams.
• Interpret requirements from conception through verification and deployment.

Skills

FPGA design

VHDL RTL

Python

TCL

Shell

Git-based development

AXI/Avalon architectures

Module-level verification

QuestaSim

Xilinx Vivado

Intel Quartus

SystemVerilog

Tools

Xilinx Vivado

Intel Quartus

QuestaSim

Job description

IC Resources is seeking a Senior FPGA Engineer in Delft to drive FPGA design for quantum control systems. You will develop RTL in VHDL, create self-checking testbenches, and contribute to UVM environments while collaborating with cross-functional teams in a research and industrial setting.

Ideal candidates have 5+ years FPGA experience, proficiency with VHDL, and hands-on experience with Xilinx Vivado or Intel Quartus, QuestaSim, and Git-based development. Knowledge of AXI/Avalon buses is a plus.