Senior Digital Design Engineer – RTL/Verilog Expert

SiTime Corp.; Rijswijk; Remote; EUR 85,000 - 140,000; Full time

Job summary

SiTime Corporation is seeking a Senior Logic Design Engineer to help push MEMS-based timing solutions from product requirements through RTL implementation, verification, and post-silicon debugging. The role emphasizes strong SystemVerilog skills and experience with synthesis, timing, and STA tooling.

The position requires a Master’s in electrical engineering with 5+ years of experience and excellent English communication.

Qualifications

• Master’s degree in electrical engineering plus 5 years of relevant work experience.
• Excellent verbal and written English communication skills.
• Proficient in Verilog and SystemVerilog.
• Expertise in digital logic design fundamentals (clock dividers, multi-clock logic, CDC, FIFO, FSM).
• Scripting in Perl/Tcl/Python is a plus.

Responsibilities

• Develop micro-architecture specifications from PRD.
• Create RTL design from architecture using Verilog/SystemVerilog.
• Develop standalone test benches to verify RTL.
• Write and verify SystemVerilog Assertions (SVA).
• Write timing constraints for synthesis/place-and-route tools.
• Run synthesis tools (Genus, Design Compiler) and fix timing issues.
• Analyze STA reports and optimize timing/area/power.
• Collaborate with analog, verification, backend, system, and test teams.
• Post-Si bring-up, validation and debugging.

Skills

Verilog/SystemVerilog

RTL design

SVA

timing constraints

Python scripting

digital design fundamentals

Education

Master’s degree in electrical engineering

Tools

Genus

Design Compiler

Verilog/SystemVerilog tools

Job description

SiTime Corporation is seeking a Senior Logic Design Engineer to help push MEMS-based timing solutions from product requirements through RTL implementation, verification, and post-silicon debugging. The role emphasizes strong SystemVerilog skills and experience with synthesis, timing, and STA tooling.

The position requires a Master’s in electrical engineering with 5+ years of experience and excellent English communication.