Sr. Analog Mixed Signal Circuit Design Engineer

The Preferred Supplier; Delft; On-site; EUR 70,000 - 90,000; Full time

Job summary

A leading technology organization in the Netherlands seeks a Sr. Analog Mixed Signal Circuit Design Engineer to design precision timing circuits leveraging MEMS technology. Responsibilities include designing circuits, performing simulations, and collaborating cross-functionally. The ideal candidate will have a Master's degree in Electrical Engineering with at least 4 years of experience or a Ph.D. with 2 years of related experience. A strong commitment to quality and teamwork in a fast-paced environment is essential.

Qualifications

• 4+ years of experience for M.S. or 2+ for Ph.D.
• Excellent academic record with published research.
• Core expertise in PLL, ADC, Temperature Sensor, or Oscillators.

Responsibilities

• Design analog and mixed-signal circuits.
• Perform calculations and verification simulations.
• Work closely with Layout Engineers.
• Document and hold design review meetings.
• Participate in chip bring up and evaluation.

Skills

CMOS circuits

Noise analysis

Matlab

VerilogA

Oceanscript

Education

M.S. in Electrical Engineering or related field

Ph.D. in Electrical Engineering

Job description

Sr. Analog Mixed Signal Circuit Design Engineer

About the job Sr. Analog Mixed Signal Circuit Design Engineer

Job Summary

TheSr.AnalogMixed-Signal Circuit Design Engineercontributes to building precisiontiming circuits, leveraging SiTime’s industry-leading MEMS technology.These products have applications ranging from high-performance Networkingand Communications Infrastructure to ultra-low power Mobile platforms includingwearable devices.

Responsibilities:

• Design analog and mixed-signalcircuits meeting architectural requirements and technical specifications
• Contribute to the architecturaldefinition of the design and chip integration
• Perform calculations, designand verification simulations to ensure building blocks meet specificationsat the schematic level and after post-layout extraction, while fullyprovisioning for DFT and DFM
• Work closely with LayoutEngineers to validate proper layout, using all best-known methods
• Document assigned blocks, andhold preliminary and final design review meetings
• Actively participate in thechip bring up, evaluation and characterization, with emphasis on ownedblocks
• Work cross-functionally withProduct, Characterization, Test, and Application Engineers on issuesrelated to owned circuit blocks
• Support other projects asneeded by management or as business needs change

Qualifications &Requirements:

• M.S. in Electrical Engineeringor related field with minimum 4 years of related experience, or Ph.D. inElectrical Engineering with minimum 2 years of related experience
• Excellent academic record withpublished research projects prototyped and proven in silicon
• Detailed knowledge of CMOScircuits and noise analysis
• Core expertise in one of thefollowing areas:
• PLL (Sigma-Delta and LC)
• ADC (preferably > 14 ENOB)
• Temperature Sensor
• Quartz or MEMS Oscillator
• Sub-threshold circuits
• Low noise regulator and bandgap
• Knowledge of programminglanguages: Matlab, VerilogA, Oceanscript,
• Ability to oversee circuitlayout for critical blocks
• Ability to perform noiseanalysis
• Knowledge of programminglanguages: MATLAB, VerilogA
• Ability to oversee circuitlayout for critical blocks

Desired Characteristics& Attributes:

• Passionate, self-starter with astrong commitment to flawless execution
• Excellent written and verbalcommunication skills required
• Ability to work well withothers in a fast-paced collaborative team environment