Package Design Engineer

NXP Semiconductors NV; Nijmegen; On-site; EUR 90,000 - 130,000; Full time

Job summary

NXP Semiconductors in the Netherlands seeks a senior package design engineer to lead the development of advanced mixed-signal, RF, and mmWave semiconductor packages. You’ll own architecture, die-package co-design, layout, and reliability optimization, interfacing with SoC designers, assembly sites, and suppliers.

The role emphasizes collaboration across global teams, design-rule compliance, and documentation to meet electrical, thermal, manufacturability, and cost objectives.

Qualifications

• Five plus years direct experience designing flip chip and wire-bond substrate-based and WLCSP/FOWLP semiconductor packages.
• Expert proficiency with Cadence Allegro Package Designer (APD) and AutoCAD required.
• Experience with die-package-PCB codesign methodologies desired.
• Knowledge of Power Integrity and Signal Integrity (PISI) and high-speed signal routing, differential pair implementation, return-path management, and impedance-controlled interconnect design a plus.
• Strong understanding of substrate technologies including design rules as well as Geometric Dimensioning and Tolerancing.
• Experience with or extensive exposure to primarily analog SoC design preferred.

Responsibilities

• Responsible for all aspects of package design from concept through best in class solution with optimal cost, manufacturability, performance and reliability.
• Utilize various industry standard die / package co-design and layout tools for design.
• Participate in die/package/PCB codesign activities, supporting critical signal paths, package architecture, floorplanning, bump maps, stackups, and routing implementation.
• Design and optimize package structures for RF and mmWave applications, including controlled-impedance routing, grounding, shielding, and signal-launch structures.
• Collaborate with simulation engineers to evaluate electrical performance, SI/PI, EM behavior, and implement design improvements.
• Support package design reviews, manufacturability assessments, design-rule compliance, and release documentation.
• Partner with assembly sites, OSATs, substrate suppliers, and cross-functional teams to deliver robust, manufacturable package solutions.
• Provide technical guidance on package architecture, substrate technologies, assembly processes, and RF package implementation.

Skills

Power Integrity & Signal Integrity

High-speed routing

Geometric Dimensioning & Tolerancing

Analog SoC design exposure

Education

Bachelor's or Master's degree in Electrical, Mechanical, Materials Engineering, or equivalent

Tools

Cadence Allegro Package Designer (APD)

AutoCAD

Job description

The Package Innovation (PI) department is an organization within NXP's Corporate Technology Office that develops advanced semiconductor packaging solutions and next-generation packaging technologies across all NXP product lines. The Package Design team is a centralized global function responsible for package development and package design execution across NXP. This position primarily supports the Networking & Radar (NR) and Automotive Processing & Systems business lines developing advanced driver assistance, radar, Vehicle-to-Everything (V2X), wireless high-frequency connectivity, and infotainment solutions for a full spectrum of radio and amplifiers.

Position Summary

Responsible for all aspects of advanced semiconductor package design for mixed signal, RF, microwave, and mmWave products, including package architecture development, die-package codesign, package layout, design rule compliance, manufacturability and reliability optimization, and technical documentation.

The successful candidate will work closely with BL partners, SoC designers, package engineers, project managers, simulation specialists, assembly sites including OSATs and substrate suppliers to develop package solutions that meet electrical, thermal, mechanical, reliability, manufacturability, and cost objectives.

Key Responsibilities

• Responsible for all aspects of package design from concept through best in class solution with optimal cost, manufacturability, performance and reliability.
• Utilize various industry standard die / package co-design and layout tools for design.
• Participate in die/package/PCB codesign activities, supporting critical signal paths, package architecture, floorplanning, bump maps, stackups, and routing implementation.
• Design and optimize package structures for RF and mmWave applications, including controlled-impedance routing, grounding, shielding, and signal-launch structures.
• Collaborate with simulation engineers to evaluate electrical performance, SI/PI, EM behavior, and implement design improvements.
• Support package design reviews, manufacturability assessments, design-rule compliance, and release documentation.
• Partner with assembly sites, OSATs, substrate suppliers, and cross-functional teams to deliver robust, manufacturable package solutions.
• Provide technical guidance on package architecture, substrate technologies, assembly processes, and RF package implementation.

Qualifications

• Bachelor's or Master's degree in Electrical, Mechanical, Materials Engineering, or equivalent.
• Technical experience in the following areas:
• Five plus years direct experience designing flip chip and wire-bond substrate-based and WLCSP/FOWLP semiconductor packages.
• Expert proficiency with Cadence Allegro Package Designer (APD) and AutoCAD required.
• Experience with die-package-PCB codesign methodologies desired.
• Knowledge of Power Integrity and Signal Integrity (PISI) and high-speed signal routing, differential pair implementation, return-path management, and impedance-controlled interconnect design a plus.
• Strong understanding of substrate technologies including design rules as well as Geometric Dimensioning and Tolerancing.
• Experience with or extensive exposure to primarily analog SoC design prefrred.

Personal Attributes

• Effective written, verbal and presentation communication skills.
• Strong technical leadership and problem-solving skills.
• Demonstrated ownership and accountability for technical deliverables.
• Self-motivated and capable of driving technical execution with minimal supervision.
• Strong collaboration and teamwork skills in a global engineering environment.

More information about NXP in the Netherlands...