Design Flow Engineer – Power Integrity & Reliability

microTECH Global Limited; Netherlands; On-site; EUR 50,000 - 70,000; Full time

Job summary

microTECH Global Limited is seeking a Design Flow Engineer for a 12-month project based in Eindhoven, Netherlands. The position involves analyzing electromigration and power integrity for semiconductor designs, ensuring their robustness and performance.

Applicants should ideally have a Bachelor’s or Master’s degree in Electronics or Electrical Engineering and a minimum of 5 years of relevant experience. This role offers a hybrid work structure with 3 days onsite and 2 days remote weekly.

Qualifications

• Minimum of 5 years industry experience in analog and RF domains.
• Experience with power-integrity and current-distribution analysis.
• Strong knowledge of electromigration and design verification.

Responsibilities

• Perform electromigration analysis on IC and power-device layouts.
• Evaluate current-density limits and identify reliability risks.
• Support design teams with technical reports and mitigation strategies.

Skills

Electromigration analysis

Power integrity evaluation

Current-density analysis

Programming in Python

Technical communication

Education

Bachelor’s or Master’s in Electronics Engineering, Electrical Engineering, or Applied Physics

Tools

Cadence Virtuoso OA

Job description

Design Flow Engineer. Working arrangements: 3 days onsite, 2 days remote weekly. Work location: Eindhoven, NL. Duration: 12 Months. Experience: ideally at least 5 years, but less is considered too (including fresh graduates).

The RF-EM Design Enablement organization develops and integrates flows and methodologies for simulating analog and RF circuits used across NXP. It also supports design teams by delivering tools and expertise that help apply this knowledge in new product designs.

The Power Integrity & Reliability Analysis Engineer ensures the robustness, performance, and long-term reliability of semiconductor designs by performing advanced analysis of interconnects and power devices. This role focuses on assessing electromigration risk, current distribution, and electrothermal effects to detect reliability concerns early in the design cycle.

The engineer analyzes current density, voltage drop, and parasitic effects to confirm that designs meet reliability and performance targets. By combining accurate physical modeling with thorough design verification, the role supports high-quality, manufacturable products and helps achieve first-time-right silicon.

Requirements:

• Perform electromigration analysis on IC and power-device layouts.
• Evaluate current-density limits and identify reliability risks in metal interconnects.
• Analyze stress-induced voiding and metal migration under operating conditions.
• Identify design weaknesses and recommend improvements to design teams.
• Develop flows and methodologies for power, electromigration, and current-density analysis.
• Assess the electrothermal reliability of interconnects and devices.
• Carry out parasitic-aware design verification and physical validation.
• Define and validate design rules related to electromigration reliability.
• Work closely with design, layout, and technology teams to improve robustness.
• Prepare technical reports that document design risks and mitigation strategies.
• Support failure analysis and reliability qualification activities.
• Develop AI/ML-based approaches to verify and analyze new RF/analog designs for improved performance.

You may also contribute to the following areas:

• Develop and improve flows and methodologies for electromagnetic radiated-emission simulation.
• Build and maintain broad knowledge of technical developments in the field.
• Support the design community in the use of EM simulation tools.
• Apply findings to improve future RF designs, including radar, 5G/6G, and radio solutions.

Your Profile

• A Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, Applied Physics, or equivalent expertise in design verification, electromigration, and AI/ML engineering.
• Industry experience in analog and RF domains, including IC, package, and PCB design, is an advantage.
• Experience with power-integrity evaluation, current-density analysis, and current-distribution analysis using commercial tools.
• Knowledge of the Cadence Virtuoso OA design environment is strongly preferred.
• Familiarity with analog and RF IC, package, PCB, and antenna design processes.
• Programming knowledge in languages such as Skill, Python, and Perl is a plus.
• Strong communication and presentation skills, with the ability to work effectively in a team.
• Proficiency in written and spoken technical English.
• Ability to thrive in a dynamic work environment.