AI-Ready RTL Design Engineer for Wearable Hardware

SNAP, Inc.; Eindhoven; On-site; EUR 90,000 - 130,000; Full time

Job summary

Snap Inc in Eindhoven is seeking an RTL Design Engineer to join the Hardware IP design team. You will micro-architect, design, implement and debug AI IPs for wearable devices, working with architecture and verification teams across a diverse international group.

The role involves RTL development, synthesis, power analysis, and documentation, with strong emphasis on collaboration and delivering high-quality IP blocks for Snap products.

Qualifications

• MSc degree in related field such as electrical engineering or equivalent years of experience.
• 5+ years of RTL hardware design and/or verification

Responsibilities

• Design and implement AI IPs for wearable devices that lead to exciting hardware launches at Snap
• Implement steps in the development cycle of IPs: microarchitecture definition, RTL design, synthesis, and PPA optimisation
• Debug design in collaboration with the verification team
• Develop and maintain flows for regression tests, synthesis, linting and power analysis
• Analyse coverage and feedback to verification to achieve coverage closure
• Collaborate with other R&D teams on neural network design, AI compilers, and OS
• Author clear and comprehensive documentation

Skills

RTL design

Verilog/SystemVerilog

VHDL

C/C++

DFX

English communication

Education

MSc in Electrical Engineering

Job description

Snap Inc in Eindhoven is seeking an RTL Design Engineer to join the Hardware IP design team. You will micro-architect, design, implement and debug AI IPs for wearable devices, working with architecture and verification teams across a diverse international group.

The role involves RTL development, synthesis, power analysis, and documentation, with strong emphasis on collaboration and delivering high-quality IP blocks for Snap products.