Design à Mexique

About the role

The Wafer Back Grinding Process Development Engineer is responsible for the development, optimization, and qualification of wafer thinning and back grinding processes for various semiconductor devices. The role ensures high-yield, cost-effective, and robust solutions that support new product introductions (NPI) and high-volume manufacturing (HVM), particularly for Analog IC.

What you will do:

• Lead process development and optimization for wafer thinning, coarse and fine back grinding, stress relief, and wafer cleaning.

• Establish and refine process parameters to achieve target thickness, surface quality, warpage control, and die integrity.

• Collaborate with package design, NPI, and manufacturing teams to align wafer back grinding strategies with downstream assembly and singulation needs.

• Qualify and manage grinding tools, tapes, DAFs (die attach films), stress relief processes (CMP, plasma, UV treatments), and cleaning systems.

• Define design rules for wafer thinning and handling based on device architecture, package type, and reliability requirements.

• Drive DOEs, capability studies (Cp, Cpk), and FA to support process validation, yield improvements, and defect elimination.

• Interface with equipment vendors (e.g., DISCO, Accretech, G&N) and material suppliers to evaluate and implement next-gen technologies.

• Develop robust process documentation: work instructions, process specifications, control plans, FMEA, and validation reports.

• Lead root cause analysis and corrective actions for grinding-related issues such as wafer cracking, edge chipping, tape residue, and warpage.

• Support HVM ramp-up, process transfers to external partners (OSATs), and continuous improvement initiatives.

• Contribute to technology roadmap for ultra-thin wafer handling, temporary bonding/debonding, and 3D packaging.

• Bachelor’s or Master’s Degree in Materials Science, Mechanical Engineering, Electronics, Chemical Engineering, or a related field.

• Minimum 8+ years of experience in semiconductor backend or wafer-level process development, with strong expertise in wafer back grinding or thinning.

• Proficient in grinding mechanics, tape/DAF selection, wafer warpage control, and surface integrity requirements for thin wafers.

• Hands-on experience with DISCO, G&N, or similar grinding equipment, UV cure systems, and post-grind cleaning tools.

• Skilled in statistical tools (e.g., Minitab, JMP), SPC, and structured problem-solving methods (FMEA, 8D, DMAIC).

• Strong documentation, communication, and cross-functional collaboration skills.

Talent acquisition based on Nexperia vacancies is not appreciated. Nexperia job adverts are Nexperia copyright material and the word Nexperia is a registered trademark.

D&I Statement

As an equal-opportunity employer, Nexperia values diversity not just because it is the right thing to do but because diverse teams perform better. We are dedicated to being inclusive, and a proof point of this dedication is that we were the main partner of the very first Dutch Paralympic Team NL House during the Paris 2024 Paralympic Games. Our recruitment process is inclusive and accessible to all, and we consider all applicants fairly, as well as providing a safe work environment and reasonable adjustments where requested.

In addition, we offer our colleagues the possibility to join employee resource groups such as the Pride Network Group or global and local Women's groups. Nexperia is committed to increasing women in management positions to 30% by 2030.