Turing Chip Project- ASIC Front end development project manager(A101996)

XPENG; Kuala Lumpur; On-site; MYR 180,000 - 280,000; Full time

Benefits offered by this job

Competitive salary package incl. **p**

Performance bonus

Growth opportunities in a growing EV品牌

Job summary

XPENG is seeking a seasoned Front-end Project Manager to lead ASIC/SoC front-end design and verification efforts in Kuala Lumpur. You will coordinate architecture, RTL, verification, and back-end teams, drive schedules, and manage risks to ensure timely handoffs.

The role requires 5+ years in semiconductor IC design with front-end leadership, strong PM skills, and fluency in English and Mandarin for technical discussions.

Qualifications

• Bachelor’s degree or higher in Microelectronics, Electronic Engineering, Computer Engineering, or a related technical discipline.
• 5+ years of experience in the semiconductor IC design industry, with a minimum of 3 years in PM or Technical Lead for front-end digital design & verification.
• Strong foundational knowledge of the digital chip design flow; familiar with RTL design & verification methodologies.
• PM skills: PMP, Agile, or Scrum Master certification preferred.
• Outstanding leadership and problem-solving abilities; highly detail-oriented under pressure.
• Fluent in English and Mandarin for complex technical discussions.
• Familiarity with project management tools and version control systems.

Responsibilities

• Front-end Project Management: oversee lifecycle of front-end ASIC/SoC design and verification from architecture to RTL to handoff.
• Cross-Functional Coordination: act as the central hub across architecture, RTL, verification, and back-end design groups.
• Schedule & Resource Planning: develop schedules, milestones, and allocate resources to meet design targets.
• Risk & Issue Management: identify bottlenecks, mitigate risks, drive cross-functional troubleshooting.
• Quality & Methodology Assurance: ensure adherence to industry design and verification methodologies; monitor metrics.
• Process Optimization: improve PM processes and communication to boost R&D efficiency and productivity.

Skills

Project management

Leadership

Problem-solving

Communication

Education

Bachelor’s degree in Microelectronics

Tools

PM tools

Version control

Job description

Job Responsibilities:

1. Front-end Project Management: Oversee the complete lifecycle of front-end ASIC/SoC design and verification projects , from initial architecture definition and RTL coding to simulation, bug tracking, and final design handoff (RTL freeze).
2. Cross-Functional Coordination: Act as the central communication hub for the local engineering teams. Coordinate closely across architecture, RTL design, verification, and physical design (back-end) groups to ensure seamless collaboration and alignment on technical specifications.
3. Schedule & Resource Planning: Develop comprehensive project schedules, define milestones, and allocate resources efficiently within the local team. Monitor daily/weekly progress against baseline plans to ensure timely delivery of design targets.
4. Risk & Issue Management: Proactively identify potential technical bottlenecks and schedule risks. Formulate effective mitigation strategies, drive cross-functional troubleshooting, and escal…
5. Quality & Methodology Assurance: Ensure the local team adheres to industry-standard design and verification methodologies. Monitor key metrics such as verification coverage, bug resolution rates, and design quality to ensure a flawless handoff to the back-end stages.
6. Process Optimization: Continuously evaluate and improve project management processes, workflows, and communication channels to enhance overall R&D efficiency and team productivity.

Qualifications:

1. Education: Bachelor’s degree or higher in Microelectronics, Electronic Engineering, Computer Engineering, or a related technical discipline.
2. Industry Experience: 5+ years of experience in the semiconductor IC design industry, with a minimum of 3 years serving in a Project Manager or Technical Lead capacity specifically focused on front-end digital design and verification.
3. Technical Acumen: Strong foundational knowledge of the digital chip design flow. Familiarity with RTL design, verification methodologies.
4. Project Management Skills: Proven track record of successfully taping out complex SoC or ASIC projects on schedule. PMP, Agile, or Scrum Master certification is highly preferred.
5. Soft Skills: Outstanding leadership and problem-solving abilities. Highly detail-oriented with the capacity to manage multiple tasks under pressure in a dynamic, fast-paced R&D environment.
6. Language: Fluent in both written and spoken English and Mandarin (essential for complex technical discussions and internal engineering alignment).
7. Tools: Highly proficient in project management, collaboration, and bug-tracking tools . Familiarity with version control systems used in IC design is a plus.

XPENG offers:

• An interesting, unique and very varied job at XPENG
• A job with an incredibly large contact surface both internally and externally
• An attractive salary package incl. pension and with the possibility of a bonus
• To be involved in the growth of an existing EV brand in Europe

Next steps:

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As part of our application process, certain positions at our company require a pre-employment screening to ensure the reliability and integrity of our employees. This screening is a standard procedure and may include components such as a Criminal Background Check from your current or previous country of residence over the past five years. Additionally, the process may involve an integrity questionnaire, verification of identification, diplomas, work experience, and consultation of the central insolvency register.

We appreciate your understanding and cooperation in this important matter, as it helps us maintain the high standards expected by our team.

Our Commitment to Diversity and Inclusion:

At XPENG, we’re an equal-opportunity employer that values diversity and positively encourages applications from suitably qualified and eligible candidates regardless of race, religion, sex, national origin, gender, sexual orientation, age, marital status, disability status or other applicable legally protected characteristics.