Staff Physical Design Engineer: Drive FinFET Power & Timing

AMD

Penang

On-site

MYR 120,000 - 190,000

Full time

10 days ago

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Job summary

AMD is seeking a skilled Back End Physical Design engineer to drive floorplanning, physical implementation, timing closure and power integrity for advanced processor technologies. The role requires deep experience with PNR tools, STA, and multi-node FinFET processes, plus scripting in Tcl/Perl/Python and strong teamwork across sites.

Ideal candidates have 10+ years in semiconductors, hands-on 16/14/12nm and sub-10nm experience, and a passion for innovative design.

Qualifications

Bachelors or Masters degree in computer engineering/Electrical Engineering.
10+ years of professional semiconductor experience.
Experience with FinFET & 16/14/12 and sub-10nm nodes.
Strong analytical and problem-solving skills.
Excellent communication and teamwork abilities.
Self-starter and able to drive tasks to completion.

Responsibilities

Floorplan and physical implementation including power plan, placement, CTS and routing.
Timing closure, synthesis, STA and EM/IR analysis.
Physical verification (DRC/LVS) and crosstalk analysis.
Scripting for methodologies in Tcl/Perl/Python.
Hands-on experience with 16/14/12nm and sub-10nm nodes.