Staff Physical Design Engineer - Power/Timing, 16nm+

AMD; George Town; On-site; MYR 180,000 - 320,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD in Penang, Malaysia, seeks an adaptive Back End Physical Design engineer to drive high-quality, industry-leading technologies to market. You will contribute to floor-planning, power-implementation, and timing closure, collaborating across sites to ensure robust designs.

The role requires passion for modern processor architecture, strong problem-solving, and a readiness to learn. 10+ years in semiconductors and RTL familiarity are highly valued for this senior position.

Qualifications

• Bachelor's or Master's in Computer or Electrical Engineering.
• 10+ years of professional experience in the semiconductor industry.
• Deep knowledge of physical design flows and RTL familiarity is a plus.

Responsibilities

• Involves Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR.
• Hands-on with PNR tools: Synopsys Design Compiler, ICC2, ICC, Fusion Compiler, PrimeTime, StarRC, Mentor Calibre, Apache Redhawk.
• Involvement in STA & timing closure; authoring methodology scripts in Tcl, Perl and/or Python.

Skills

Floor-plan

Physical Implementation

Synthesis

Placement

Timing Closure

Routing

DRC/LVS

EM/IR

Crosstalk Analysis

Education

Bachelor's or Master's in Computer or Electrical Engineering

Tools

Synopsys Design Compiler

ICC2

ICC

Fusion Compiler

PrimeTime

StarRC

Mentor Calibre

Apache Redhawk

Job description

AMD in Penang, Malaysia, seeks an adaptive Back End Physical Design engineer to drive high-quality, industry-leading technologies to market. You will contribute to floor-planning, power-implementation, and timing closure, collaborating across sites to ensure robust designs.

The role requires passion for modern processor architecture, strong problem-solving, and a readiness to learn. 10+ years in semiconductors and RTL familiarity are highly valued for this senior position.