SoC Physical Design Engineer — PnR & Timing Expert

Infinecs Systems Pvt. Ltd.; Bayan Lepas; Sur place; MYR 120 000 - 180 000; Plein temps

Résumé du poste

Infinecs Systems Pvt. Ltd. in Bayan Lepas (Penang) seeks a Physical Design Engineer to lead the RTL-to-GDS flow for cutting-edge SoC projects. You will perform synthesis, floorplanning, CTS, PnR, and signoff with a focus on power and timing accuracy.

The role requires hands-on experience with place-and-route, DRC/LVS, and advanced low-power methodologies, using Synopsys and Cadence tools. You will collaborate with global teams on tight schedules.

Qualifications

• Bachelor's degree in electrical/electronics/computer engineering or related discipline.
• Strong knowledge of digital logic, VHDL/RTL, and Verilog.
• Proficiency in Python, Perl, and TCL for CAD flow automation.
• Experience with Synopsys and Cadence EDA tools.
• Hands-on experience with place-and-route, CTS, timing convergence, and IR drop analysis.

Responsabilités

• Execute physical design flow from RTL to GDS (synthesis, floorplanning, power grid, PnR, CTS) and participate in design/architecture reviews.
• Evaluate and improve physical design methodologies for complex SoC/IP designs.
• Collaborate with local and multi-site teams, including remote members.
• Assist full-chip timing constraints development, STA, and timing signoff.
• Assist in full-chip physical verification (DRC/LVS) and EM/IR convergence.

Connaissances

Digital logic

VHDL/RTL

Verilog

CAD flow automation

Python scripting

Formation

Bachelor's degree in Electrical Engineering

Electronics Engineering

Computer Engineering

Outils

Synopsys Fusion Compiler

PrimeTime

IC Validator

VC Low-Power

Innovus

Tempus

Virtuoso

Conformal Low-Power

Description du poste

Infinecs Systems Pvt. Ltd. in Bayan Lepas (Penang) seeks a Physical Design Engineer to lead the RTL-to-GDS flow for cutting-edge SoC projects. You will perform synthesis, floorplanning, CTS, PnR, and signoff with a focus on power and timing accuracy.

The role requires hands-on experience with place-and-route, DRC/LVS, and advanced low-power methodologies, using Synopsys and Cadence tools. You will collaborate with global teams on tight schedules.