Senior SoC Architect: Multimedia IP & System Integration

XPENG; Kuala Lumpur; On-site; MYR 150,000 - 240,000; Full time

Benefits offered by this job

Varied role at XPENG

Large internal/external contact scope

Competitive salary + pension + bonus

Growth of a European EV brand

Job summary

XPENG is seeking a SoC Engineer with strong ASIC/front-end experience to drive solution design, micro-architecture, and IP integration for multimedia and perception-related SoC subsystems. The role may cover camera, ISP, display, video codec, DSP / accelerators, MIPI interfaces, and broader SoC integration.

You will work across RTL, verification, backend, software, and system teams to deliver robust silicon solutions.

Qualifications

• Bachelor’s degree or above in Electrical Engineering, Microelectronics, Computer Engineering, Communication Engineering, Automation, or related fields.
• 3+ years of ASIC / SoC front-end design, IP design, subsystem design, or SoC integration experience.
• Solid understanding of SoC / IP design methodology, including specification, solution proposal, micro-architecture, RTL implementation support, verification support, integration support, and tapeout support.
• Familiarity with Verilog / SystemVerilog and ability to understand RTL design quality.
• Familiarity with AXI / AHB / APB, NoC / fabric, DMA, interrupts, clock/reset, power domains, memory subsystem, debug, security, and register interfaces.
• Experience in IP or subsystem integration, including interface adaptation, parameter configuration, register mapping, clock/reset, power domains, bandwidth / QoS, CDC/RDC, and integration closure.
• Experience in high-throughput multimedia datapath design or analysis, with understanding of pipelines, buffers, back-pressure, bandwidth, latency, QoS, and area / power / performance trade-offs.
• Hands-on project experience in at least one of: camera / ISP, display, video codec, DSP / accelerator, MIPI, DP/eDP, or SoC integration.
• Ability to read and write English technical documents.
• Strong cross-functional communication and issue-closure capability.

Responsibilities

• Participate in solution definition, module partitioning, and micro-architecture design for multimedia and perception-related SoC subsystems based on product, system, and SoC architecture requirements.
• Own or contribute to technical solution design for camera, ISP, display, video, DSP / accelerator, multimedia interface, or SoC integration related IPs and subsystems.
• Define key IP or subsystem micro-architecture, including datapath, control path, DMA, buffers, register models, interrupts, debug, error handling, clock/reset, and power management.
• Participate in internal or third-party IP evaluation, selection, parameter configuration, wrapper / adaptor design, interface adaptation, and SoC integration.
• Own or support integration of IPs and subsystems with SoC fabric, memory subsystem, CPU / DSP / NPU / GPU, firmware / software, clock/reset, power domains, security / firewall, and debug / trace infrastructure.
• Analyze and optimize multimedia performance, bandwidth, latency, and power, including resolution, frame rate, multi-stream scenarios, memory bandwidth, QoS, buffer sizing, pipeline depth, clock frequency, and area / power / performance trade-offs.
• Develop and maintain design documents, including architecture proposals, micro-architecture specifications, IP integration specifications, register specifications, interface specifications, performance analysis, and integration guidelines.
• Work with RTL, verification, backend, software, driver, algorithm, system, and project teams on design review, verification planning, integration closure, tapeout support, and silicon bring-up.
• Support complex issue analysis and closure across interface protocols, data flow, bandwidth bottlenecks, clock/reset, CDC/RDC, low power, timing, DFT, software configuration, and post-silicon debug.

Skills

SoC front-end design

IP integration

System integration

Verilog/SystemVerilog

RTL understanding

English technical documents

Cross-functional communication

Education

Bachelor's degree in Electrical Engineering or related

Tools

Verilog/SystemVerilog

Linux drivers (V4L2/DRM/KMS)

Job description

XPENG is seeking a SoC Engineer with strong ASIC/front-end experience to drive solution design, micro-architecture, and IP integration for multimedia and perception-related SoC subsystems. The role may cover camera, ISP, display, video codec, DSP / accelerators, MIPI interfaces, and broader SoC integration.

You will work across RTL, verification, backend, software, and system teams to deliver robust silicon solutions.