Senior Silicon DFX/DFT Verification Engineer

AMD; Penang; Hybrid; MYR 150,000 - 260,000; Full time

Job summary

AMD in Penang, Malaysia is seeking a seasoned DFx Verification Engineer to verify architecture, design and DFT/DFD features for cutting-edge Radeon Technologies Group products.

You will collaborate with architecture, IP design, Physical Design, and firmware teams to ensure first-pass silicon success, build directed and random DFT tests, and debug issues with RTL/DFT and firmware engineers in a global environment.

Qualifications

• 8+ years of experience in DFT design verification.
• Experience with SystemVerilog/UVM testbench development for complex SoCs including GLS & SDF verifications.
• Advanced scripting skills (Python, Perl) for automation.
• Deep knowledge of digital RTL design and verification flows.
• Strong debugging skills, including non-logged environments.

Responsibilities

• Verify and implement DFT architecture and features.
• Collaborate with architects and engineers to verify new DFT features.
• Estimate time to write new feature tests and adjust test environment.
• Build directed and random DFT verification tests.
• Debug failures and work with RTL/DFT and firmware engineers to fix issues.
• Enhance legacy DFT test plans for new Debug features.
• Recreate post-silicon failures in pre-silicon environment.
• Conduct silicon debug and root cause analysis with minimal logs.
• Utilize JTAG protocols for debugging and validation.

Skills

DFT Design Verification

SystemVerilog/UVM

Python scripting

RTL design & verification

Debugging without logs

Complex infrastructure adaptation

Leadership / mentorship

Firmware debugging

JTAG protocol debugging

Education

Bachelor's or Master's in Computer Engineering / Electrical Engineering

Tools

Simulation tools

JTAG debugging tools

Job description

AMD in Penang, Malaysia is seeking a seasoned DFx Verification Engineer to verify architecture, design and DFT/DFD features for cutting-edge Radeon Technologies Group products.

You will collaborate with architecture, IP design, Physical Design, and firmware teams to ensure first-pass silicon success, build directed and random DFT tests, and debug issues with RTL/DFT and firmware engineers in a global environment.