Senior Staff SOC DFX Verification Engineer

AMD; Penang; Hybrid; MYR 150,000 - 260,000; Full time

Job summary

AMD in Penang, Malaysia is seeking a seasoned DFx Verification Engineer to verify architecture, design and DFT/DFD features for cutting-edge Radeon Technologies Group products.

You will collaborate with architecture, IP design, Physical Design, and firmware teams to ensure first-pass silicon success, build directed and random DFT tests, and debug issues with RTL/DFT and firmware engineers in a global environment.

Qualifications

• 8+ years of experience in DFT design verification.
• Experience with SystemVerilog/UVM testbench development for complex SoCs including GLS & SDF verifications.
• Advanced scripting skills (Python, Perl) for automation.
• Deep knowledge of digital RTL design and verification flows.
• Strong debugging skills, including non-logged environments.

Responsibilities

• Verify and implement DFT architecture and features.
• Collaborate with architects and engineers to verify new DFT features.
• Estimate time to write new feature tests and adjust test environment.
• Build directed and random DFT verification tests.
• Debug failures and work with RTL/DFT and firmware engineers to fix issues.
• Enhance legacy DFT test plans for new Debug features.
• Recreate post-silicon failures in pre-silicon environment.
• Conduct silicon debug and root cause analysis with minimal logs.
• Utilize JTAG protocols for debugging and validation.

Skills

DFT Design Verification

SystemVerilog/UVM

Python scripting

RTL design & verification

Debugging without logs

Complex infrastructure adaptation

Leadership / mentorship

Firmware debugging

JTAG protocol debugging

Education

Bachelor's or Master's in Computer Engineering / Electrical Engineering

Tools

Simulation tools

JTAG debugging tools

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE:

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

As a DFx Verification Engineer, you will be primarily responsible for verification of architecture, design, and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for cutting edge AMD products and will be working with a team of design engineers from various global design locations on design‑for-test (DFT) design and implementation, tool and methodology development, project execution and continuous improvement initiatives, this role provides an excellent growth opportunity for robust individuals looking to make a difference.

KEY RESPONSIBLITIES

• Implementation and verification of DFT architecture and features
• Collaborate with architects, design engineers, and firmware engineers to understand the new DFT features to be verified
• Estimate the time required to write the new feature tests and any required changes to the test environment
• Build the directed and random DFT verification tests
• Debug test failures to determine the root cause; work with RTL/DFT and firmware engineers to resolve design defects and correct any test issues
• Analyze and enhance legacy DFT test plans to accommodate new Design for Debug feature developments
• Recreate post-silicon failures in pre-silicon environment
• Conduct silicon debug and root cause analysis with minimal logging support
• Utilize JTAG protocols for debugging and validation

PREFERRED EXPERIENCE

• 8+ years of experience in DFT Design Verification with strong debug capabilities
• Experienced with SystemVerilog/UVM testbench development for complex SoCs Including GLS & SDF verifications
• Advanced scripting skills (Python, Perl, etc.) for automation and testbench infrastructure
• Deep knowledge of digital design, RTL design, and verification flows
• Strong troubleshooting and analytical debugging skills with ability to debug without logs
• Ability to quickly adapt to complex infrastructure environments
• Excellent hands‑on debug skills and attention to detail
• Proficient in debugging firmware and RTL code using simulation tools
• Exposure to leadership or mentorship is an asset

ACADEMIC CREDENTIALS

• Bachelors or Masters degree in computer engineering/Electrical Engineering.

LOCATION

Penang, Malaysia

#LI-KL1

#LI-Hybrid

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.