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Bitdeer is seeking an experienced RTL Design Engineer in Penang, Malaysia to contribute to ASIC design using Verilog HDL. You will participate in architectural discussions, perform RTL coding, and support design reviews, ensuring quality from specification to tape-out.
You will collaborate with verification, emulation and implementation teams, apply strong computer architecture and VLSI knowledge, and work on GPGPU/NPU/CPU modules.
Bitdeer is seeking an experienced RTL Design Engineer in Penang, Malaysia to contribute to ASIC design using Verilog HDL. You will participate in architectural discussions, perform RTL coding, and support design reviews, ensuring quality from specification to tape-out.
You will collaborate with verification, emulation and implementation teams, apply strong computer architecture and VLSI knowledge, and work on GPGPU/NPU/CPU modules.