Senior PCIe IP Integration Engineer

Bitdeer Technologies Group; Penang; On-site; MYR 120,000 - 180,000; Full time

Job summary

Bitdeer Technologies Group in Penang is seeking an experienced PCIe IP Integration Engineer to develop and implement Verilog RTL for PCIe IP blocks and support verification closure. You will collaborate closely with verification and software teams to deliver robust IP solutions and ensure coverage across all stages of design.

Ideal candidates bring a Master’s or Bachelor’s in Electrical/Computer Engineering with 5+ years in semiconductor R&D, strong PCIe knowledge, and scripting ability in Perl,

Qualifications

• Master’s degree (preferred) or Bachelor’s degree in Electrical Engineering, or Computer Engineering.
• 5+ years in a semiconductor or high technology R&D environment.
• Verilog RTL development experience with industry-standard tools in an SoC/IP environment.
• PCIe IP integration experience.
• Strong understanding of PCIe architecture and logic design.
• Strong problem-solving and debugging skills.
• Comfort with scripting languages (Perl, Shell, TCL) to automate design tasks.

Responsibilities

• Implement Verilog RTL for PCIe IP blocks and related IPs, focusing on integration, configuration and performance evaluation.
• Support verification closure by ensuring 100% coverage functionality.
• Contribute to design verification and assist in debugging issues across pre-silicon and post-silicon stages.
• Support software development.

Skills

Verilog RTL development

PCIe IP integration

Scripting (Perl, Shell, TCL)

Debugging skills

Education

Master’s degree in Electrical/Computer Engineering

Bachelor’s degree in Electrical/Computer Engineering

Tools

Verilog RTL tools

SoC/IP industry tools

Job description

Bitdeer Technologies Group in Penang is seeking an experienced PCIe IP Integration Engineer to develop and implement Verilog RTL for PCIe IP blocks and support verification closure. You will collaborate closely with verification and software teams to deliver robust IP solutions and ensure coverage across all stages of design.

Ideal candidates bring a Master’s or Bachelor’s in Electrical/Computer Engineering with 5+ years in semiconductor R&D, strong PCIe knowledge, and scripting ability in Perl,