Senior Analog/Mixed-Signal Layout Engineer (FPGA)

Altera; George Town; On-site; MYR 180,000 - 300,000; Full time

Job summary

Altera is seeking an experienced Analog Layout Design Engineer to lead the FPGA physical design and layout of complex digital, analog and mixed-signal ICs in Penang, Malaysia.

You will collaborate with circuit designers, plan layout schedules, perform floorplanning, routing, and physical verification (DRC, LVS, ERC). Mentoring junior engineers and coordinating with foundries are key aspects of the role.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field.
• 8+ years of experience in analog/mixed-signal IC layout design.
• Proficiency with Cadence Virtuoso and Mentor Graphics.
• Deep understanding of transistor-level layout sensitivities (matching, parasitics, noise).

Responsibilities

• Lead layout design of digital, analog and mixed-signal circuits.
• Collaborate with circuit designers to meet requirements and performance targets.
• Plan layout schedules, resources and deliverables for projects.
• Perform floorplanning, placement and routing optimizing area and performance.
• Conduct DRC, LVS, ERC checks including RV verification.
• Mentor junior layout engineers and drive design reviews.
• Interface with foundries to ensure DRC compliance and best practices.
• Document layout methodology and maintain guidelines.

Skills

Analog/mixed-signal layout

FPGA layout

Leadership

Communication

Education

Bachelor/Master in Electrical Engineering

Tools

Cadence Virtuoso

Mentor Graphics

Job description

Altera is seeking an experienced Analog Layout Design Engineer to lead the FPGA physical design and layout of complex digital, analog and mixed-signal ICs in Penang, Malaysia.

You will collaborate with circuit designers, plan layout schedules, perform floorplanning, routing, and physical verification (DRC, LVS, ERC). Mentoring junior engineers and coordinating with foundries are key aspects of the role.