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Carsem in Ipoh, Malaysia seeks a seasoned Leadframe & Substrate Design Engineer to lead design, simulation, and rules development for advanced semiconductor packaging.
You will drive sub-micron precision packaging in the power discrete segment, bridging CAD modeling, multiphysics simulations, DFM/DFT, and customer-facing technical support.
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We are seeking a seasoned Leadframe & Substrate Design Engineer to lead the design, simulation, and rules development for advanced semiconductor packaging.
In this role, you will drive sub-micron precision packaging solutions in the power discrete segment (expanding beyond traditional QFNs into advanced power modules). You will bridge the gap between initial CAD modeling, multiphysics simulations, DFM rules, and customer-facing technical support.
We are seeking a seasoned Leadframe & Substrate Design Engineer to lead the design, simulation, and rules development for advanced semiconductor packaging.
In this role, you will drive sub-micron precision packaging solutions in the power discrete segment (expanding beyond traditional QFNs into advanced power modules). You will bridge the gap between initial CAD modeling, multiphysics simulations, DFM rules, and customer-facing technical support.
Lead 3D mechanical modeling, design, and simulation of leadframes and substrates using industry-standard CAD tools to support progressive stamping die creation.
Apply Geometric Dimensioning and Tolerancing (GD&T) to ensure sub-micron precision for critical power and thermal packaging components.
Perform Thermal Mechanical Analysis (TMA) and Electrical Parasitic Modeling/Simulations to evaluate high-power performance.
Conduct robust Finite Element Analysis (FEA) simulations to mitigate early-stage design risks (stress, warpage, thermal management).
Establish and update internal design rules based on customer specifications and packaging assembly process capabilities.
Systematically incorporate Design for Manufacturability (DFM) and Design for Testing (DFT) principles into early design phases.
Apply knowledge of stamped and etched leadframe tooling specifications and manufacturing methodologies.
Perform worst-case tolerance stack-up analysis, DFMEA, and reliability risk assessments.
Ensure all designs meet strict cost, thermal, electrical performance, and international industry standards/regulations.
Stay ahead of emerging semiconductor packaging technologies, materials, and power discrete industry trends.
Collaborate closely with internal cross-functional teams, including Assembly Process Engineering, Mechanical Engineering, Quality Assurance, and Tooling vendors.
Lead technical design reviews and directly engage with key customers and external technical partners throughout project development.
Experience: Minimum 7+ years of hands‑on experience in Leadframe & Substrate Design, specifically within the Power Discrete segment (QFN, DFN, Clip‑bond, etc.).
Specialized Experience: Exposure to Power Module Design is a strong added advantage.
CAD & Simulation Tools: Expertise in high-end CAD software (e.g., SolidWorks, AutoCAD, Creo) and FEA/multiphysics simulation suites (e.g., Ansys, COMSOL).
Technical Mastery: Deep proficiency in GD&T, DFM/DFT, thermal/electrical modeling, and tolerance analysis.
Fabrication Knowledge: Strong understanding of sheet metal fabrication, precision stamping, etching, welding, and riveting techniques.
Communication: Excellent technical communication skills with a proven track record in customer-facing technical reviews.