Lead Principal Engineer Technology Integration

Infineon Technologies; Malacca City; On-site; MYR 120,000 - 180,000; Full time

Job summary

Infineon Technologies in Malaysia seeks a seasoned packaging and technology integration engineer to drive DFMEA, risk assessment, and integration of unit processes in the package platform. You will partner with FE teams to ensure smooth FE/BE interaction and advance new chip technology readiness.

The role requires a engineering degree with extensive IC/semiconductor packaging experience and strong communication and problem-solving skills.

Qualifications

• Bachelor’s degree in engineering with 10 years in IC/semiconductor environments.
• Experience in SMT, semiconductor packaging, assembly and test.
• Strong communication, collaboration and problem-solving skills.
• Knowledge of FE/BE interactions and BE/BE interfaces.
• Familiarity with DFMEA/PFMEA and 8D/T6s methods.
• Experience with internal package analysis and first-level reliability.

Responsibilities

• Drive package technology DFMEA process of record and risk interaction mitigation.
• Own risk interaction assessment and mitigation work packages.
• Coordinate integration of unit processes (BOM and Process) in the package platform.
• Collaborate with FE for FE/BE interaction and integration topics.
• Support pre-development for new chip technology.

Skills

Communication skills

FE/BE Interaction

DFMEA/PFMEA

8D & T6s

Internal Package analysis

Education

Bachelor’s Degree in Engineering (Semiconductor Technology, Microelectronics, Automation, Mechanical, Electrical, Electronics Physics)

Job description

Drive Technology Integration activities to ensure the package fulfil all requirements in the aspect of Process Interaction. Key working partner for FE colleagues for new FE technology.

Your role

Key responsibilities in your new role

• PBC and TPC assessment.


• Driver of Package Technology DFMEA Process of Record.


• Owner of Risk Interaction assessment and mitigation work packages.


• Integration of unit processes (BOM and Process) in package platform -Risk assessment, study interaction with other processes, process flow.


• Working partner for FE in FE/BE interaction and integration topics.


• Support Pre development for new Chip technology.

Your profile

Qualifications And Skills To Help You Succeed

• Bachelor’s Degree in Engineering (Semiconductor Technology, Microelectronics, Automation, Mechanical, Electrical, Electronics Physics) with 10 years of working experience in IC/semiconductor environment SMT, Semiconductor Packaging, Assembly and Test knowledge.


• Good aptitude for communication, collaboration, negotiation and solution finding.


• Knowledge of FE/BE and BE/BE Interaction.


• Knowledge of 8D & T6s methodology.


• Knowledge of DFMEA/PFMEA.


• Knowledge of Internal Package analysis/ first level reliability.

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