Lead FPGA Design Engineer – Fabric PPC

Advanced Micro Devices; Penang; On-site; MYR 120,000 - 180,000; Full time

Benefits offered by this job

AMD benefits

Job summary

AMD in Penang, Malaysia is seeking a design engineer for the FPD design team to lead and optimize the Fabric PPC in the Adaptive & Embedded Computing Group. You will drive new ideas, evaluate future architectures, enable test chip designs, and provide technical direction to fellow engineers.

You will collaborate with silicon teams and review IPs for quality, performance, power, and cost, helping ensure success across digital and analog design, layout, integration, and sign-off processes.

Qualifications

• Bachelor's or Master's degree in computer engineering or electrical engineering.
• Experience with FPGA fabric, programmable logic, and PPC design.
• Experience with high-performance and low-power design techniques.
• Ability to work with cross-functional silicon teams.

Responsibilities

• Execute in FPD team supporting Fabric research and development.
• Enable new capabilities in the FPGA fabric to improve PPC.
• Evaluate key new features in the fabric with deep understanding of software capabilities.
• Design reviews to reduce product risk, improve PPC and schedule.
• Evaluate and develop yield improvement techniques.
• Understand product roadmaps and enable new foundry technologies.
• Leverage and deploy AMD solutions in the fabric.

Skills

Programmable logic

Process/Packaging tech

Circuit margins

SRAM design

High performance & low power

FUSA requirements

Design for Manufacturing

Micro-architecture

Communication skills

Education

Bachelors or Masters in Computer/Electrical Engineering

Job description

AMD in Penang, Malaysia is seeking a design engineer for the FPD design team to lead and optimize the Fabric PPC in the Adaptive & Embedded Computing Group. You will drive new ideas, evaluate future architectures, enable test chip designs, and provide technical direction to fellow engineers.

You will collaborate with silicon teams and review IPs for quality, performance, power, and cost, helping ensure success across digital and analog design, layout, integration, and sign-off processes.