IP Design Verification Engineer

Intel Corporation; Penang; On-site; MYR 140,000 - 210,000; Full time

Job summary

Intel Corporation in Malaysia seeks an experienced RTL verification engineer to collaborate with architects, RTL developers, and design teams to validate complex architectural features. You will validate IP designs, create BFMs, and develop tests and coverage with SystemVerilog, UVM/OVM, and GLS as you support SoC integration.

The role requires strong DDR5/LPDDR5 knowledge, UNIX shell scripting, and C programming, with a focus on pre-silicon validation and automation across global teams.

Qualifications

• Bachelor's or advanced degree in Electrical/Computer Engineering.
• 6+ years with a Bachelor's, 4+ years with a Master's, or 2+ years with a PhD.
• Strong proficiency in SystemVerilog and verification methodologies such as OVM and UVM.
• Expertise in DDR protocols, particularly LPDDR5 and DDR5, with validation experience across specs to coverage.
• Experience with industry-standard verification tools such as VCS, DVE, Verdi, etc.
• Familiarity with UNIX environments and shell scripting and C programming.

Responsibilities

• Own RTL validation for functional and/or DFx (design for test/debug).
• Define verification strategies, methodologies, and detailed test plans for RTL validation.
• Create BFMs to interface with the IP, monitor transactions, and verify protocol compliance.
• Implement and execute test cases, assertions, and functional coverage using SystemVerilog.
• Set up and perform gate-level simulations (GLS) to verify asynchronous and multi-cycle paths.
• Debug test failures in RTL and GLS environments, identify root causes and fix.
• Analyze functional and code coverage metrics to identify gaps and improve coverage.
• Automate pre-silicon validation flows by creating tools/scripts using Tcl, Tk, Perl, or Python.
• Collaborate with system and SoC teams on IP integration and issue resolution.
• Maintain and enhance verification methodologies and infrastructure.

Skills

SystemVerilog

UVM/OVM

DDR5 LPDDR5

C programming

Unix & Shell scripting

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

VCS

DVE

Verdi

Job description

Job Details: Job Description: Your work will involve collaborating with architects, RTL developers, and physical design teams to validate complex architectural and microarchitectural features. Through your expertise, you will ensure the robustness of Intel's IP designs, delivering critical contributions to the broader goals of Intel's success.

Key Responsibilities

• Own RTL validation for functional and/or DFx (design for test/debug).
• Define verification strategies, methodologies, and detailed test plans for effective RTL validation.
• Create Bus Functional Models (BFM) to interface with the IP, monitor transactions, and verify protocol compliance.
• Implement and execute test cases, assertions, and functional coverage using System Verilog, ensuring alignment with verification plans.
• Set up and perform gate-level simulations (GLS) to verify asynchronous and multi-cycle paths.
• Debug test failures in RTL and GLS environments, identifying root causes and implementing corrective measures.
• Analyze functional and code coverage metrics to identify gaps and achieve full verification coverage.
• Automate pre-silicon validation flows by creating tools or scripts, leveraging programming languages such as Tcl, Tk, Perl, or Python.
• Collaborate with system and SoC teams on IP integration, ensuring smooth integration and resolving all related issues.
• Maintain and enhance verification methodologies, contributing to the improvement of validation infrastructure.

Qualifications

• Bachelor's or advanced degree in Electrical Engineering, Computer Engineering, or a related discipline.
• 6+ years of experience with a Bachelor's degree, 4+ years with a Master's degree, or 2+ years with a PhD.
• Strong proficiency in System Verilog and verification methodologies such as OVM and UVM.
• Expertise in DDR protocols, particularly LPDDR5 and DDR5, with experiences covering all stages of validation from specifications to coverage.
• Skilled in RTL validation, logic design, DFx concepts, and IP microarchitecture debug methodologies.
• Experience with industry-standard verification tools such as VCS, DVE, Verdi, or similar tools.
• Familiarity with UNIX environments and fluency in shell scripting and C programming.

Preferred Qualifications

• Advanced problem-solving skills with the ability to debug simulation failures and resolve formal verification challenges.
• Proficiency in automating verification processes using Tcl, Tk, Perl, and Python to improve efficiency and scalability.
• Strong oral and written communication skills, with the ability to work effectively with cross-functional teams and global partners.

Join us in pushing the boundaries of technology and innovation. Your contributions will help shape the future of computing at Intel.

Job Type: Experienced Hire

Shift: Shift 1 (Malaysia)

Primary Location: Malaysia, Penang

Additional Locations:

Position of Trust N/A

Work Model for this Role: This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at your assigned Intel site and off-site.

Job posting details (such as work model, location or time type) are subject to change.

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.