IO Circuit Design Engineer

Silicon One; Bayan Lepas; On-site; MYR 120,000 - 240,000; Full time

Benefits offered by this job

Competitive compensation package

Full lifecycle exposure

Job summary

Silicon One in Bayan Lepas, Penang, Malaysia is seeking a senior IC designer to lead full-custom mixed-signal design efforts from specifications through tape-out. You will work closely with system designers to refine analog models and optimize performance across advanced process nodes.

The role requires 5+ years in IP/SoC design with strong analog design fundamentals and hands-on EDA tool proficiency (Cadence, Hspice, Virtuoso, Spectre, AMS). On-site in Bayan Lepas with a competitive package.

Qualifications

• 5+ years hands-on IP/SoC design experience in mixed-signal IO or system validation.
• Strong knowledge of full-custom design and analog circuit modeling.
• Proficiency with EDA tools and familiarity with LVDS/DDR interfaces.

Responsibilities

• Define module specifications and lead full-custom design tasks.
• Support layout activities including floorplanning and optimization.
• Lead final tape-out delivery and ensure GDSII integrity.
• Collaborate with system designers to refine analog circuit models and optimize performance.
• Oversee layout verification (DRC/LVS) and ensure data integrity of tape-out.

Skills

Full-custom design

Analog circuit design

Signal integrity

LVDS/DDR interfaces

Clock networks

Education

Bachelor’s degree in Microelectronics/ICs

Tools

Cadence

Hspice

Virtuoso

Spectre

AMS

Job description

• Design & Architecture: Define module specifications and lead full-custom design tasks.
• Physical Implementation: Support layout activities, including floorplanning and optimization.
• Full-Custom Design: Independently oversee and perform module design tasks using full-custom flows based on advanced process nodes.
• Collaboration: Work with system designers to refine analog circuit models and optimize design performance.
• Tape-out Delivery: Lead final layout verification (DRC/LVS) and ensure the integrity of final tape-out data (GDSII).

Location: Bayan Lepas, Penang, Malaysia

Job Type: Full-time (On-site)

Key Responsibilities

Requirements

• Design & Architecture: Define module specifications and lead full-custom design tasks.
• Physical Implementation: Support layout activities, including floorplanning and optimization.
• Full-Custom Design: Independently oversee and perform module design tasks using full-custom flows based on advanced process nodes.
• Collaboration: Work with system designers to refine analog circuit models and optimize design performance.
• Tape-out Delivery: Lead final layout verification (DRC/LVS) and ensure the integrity of final tape-out data (GDSII).

Position Requirements

• Experience: Minimum 5+ years of hands-on experience in IP or SoC design, focusing on mixed-signal IO or system validation.
• Experience: Extensive hands-on experience in IP or SoC design, specifically in mixed-signal IO or system validation.
• Technical Skills: Mastery of full-custom design methodologies and proficiency with standard EDA tools for circuit design and simulation. Strong understanding of analog circuit design, signal integrity, and device characteristics.
• Proficient with EDA tools: Cadence, Hspice, Virtuoso, Spectre, AMS , etc.
• Strong foundation in analog circuit design and signal integrity.
• Preferred Domains: Experience in designing LVDS, DDR3/4/5, LPDDR4/5, ADC, PLL, or Clock Networks .
• Language & Communication: Excellent communication skills. Ability to speak and write in Mandarin is a significant advantage.
• Education: Bachelor’s degree or above (Microelectronics or Integrated Circuits preferred).

Why Silicon One?

• Full Lifecycle Exposure: Drive designs from initial specification through to successful tape-out.
• Competitive Rewards: We offer a highly attractive compensation package for top-tier lead talent.

Ready to lead the future of mixed-signal design?