Design Verification Engineer

Tranzium Semi; Malaysia; On-site; MYR 60,000 - 120,000; Full time

Job summary

Tranzium Semi Private Limited is seeking a Design Verification (DV) Engineer to validate complex, next-generation ASIC/SoC designs. You will collaborate with design architecture teams to build robust verification environments from scratch, identify critical bugs, and help ensure first-pass silicon success.

The role sits in Hardware and Networks - Other, requiring strong verification skills and a hands-on mindset to drive robust test benches and prove design correctness in a fast-paced

Qualifications

• Design Verification for ASIC/SoC blocks and sub-systems.
• Collaborate with design architecture teams to build verification environments from scratch.
• Identify critical bugs and ensure first-pass silicon success.

Responsibilities

• Validate complex next-generation ASIC/SoC designs.
• Develop and maintain verification testbenches and test vectors.

Skills

ASIC/SoC verification

Education

B.Tech / B.E. in Electronics and Communication Engineering

Job description

Design Verification (DV) Engineer to validate complex,next-generation ASIC/SoC designs.collaborate with design architecture teams to build robust verification environments from scratch, identify critical bugs, and ensure first-pass silicon success.

Role Category: Hardware and Networks - Other

Education

UG: B.Tech / B.E. in Electronics and Communication Engineering (ECE)

Key Skills

Skills highlighted with ‘‘ are preferred keyskills

Tranzium Semi Private Limited