ASIC/SoC Verification Engineer

ThunderSoft

Penang

On-site

MYR 120,000 - 180,000

Full time

6 hours ago
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Job summary

Thundersoft seeks an experienced ASIC/SoC design verification engineer to drive USB IP verification across USB 2.0/3.x/USB4. You will build reusable testbenches, develop directed and constrained-random test cases, and work with designers to close coverage.

You will integrate third-party VIP, debug failures, and push coverage closure while collaborating with firmware and post-silicon teams. Strong SystemVerilog/UVM skills and scripting are required.

Qualifications

  • Hands-on ASIC/SoC verification experience required.
  • Strong SystemVerilog and UVM proficiency.
  • Experience with USB protocols or high-speed interfaces.

Responsibilities

  • Develop verification plans for USB IP blocks.
  • Build reusable testbenches and scoreboards.
  • Create directed and constrained-random tests.
  • Integrate and verify third-party VIP.
  • Debug failures and drive issue resolution with RTL team.
  • Contribute to coverage models and closure.
  • Collaborate with firmware and post-silicon teams.

Skills

SystemVerilog
UVM
USB protocols
Python scripting
Testbench development
Debugging
Communication skills

Education

EE/CE degree

Tools

Synopsys VCS
Cadence Xcelium
Mentor Questa

Job description

  • Develop and execute comprehensive verification plans for USB IP blocks (Device/Host/DRD) and subsystems, covering USB 2.0, USB 3.2, and USB4 specifications.
  • Build and maintain scalable, reusable verification environments (testbenches, scoreboards, models, and checks) using SystemVerilog and UVM/OVM methodologies.
  • Create directed and constrained-random test cases to achieve functional coverage targets and verify design robustness.
  • Integrate and verify third-party VIP (Verification IP) and ensure compliance with USB-IF standards.
  • Debug test failures, identify root causes, and work with design engineers to resolve issues in RTL and microarchitecture.
  • Implement and maintain functional coverage models and drive coverage closure.
  • Participate in code reviews, verification methodology improvements, and flow automation (e.g., CI/CD, regression management).
  • Collaborate with firmware and post-silicon validation teams to support bring-up and debug.
  • Document verification plans, test results, and coverage reports.

Required Qualifications

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
  • 3~5 years of hands-on experience in ASIC/SoC design verification.
  • Strong proficiency in SystemVerilog and UVM (Universal Verification Methodology).
  • Proven experience verifying USB protocols (USB 2.0, USB 3.x, USB4) or similar high-speed serial interfaces (e.g., PCIe, DisplayPort, Thunderbolt).
  • Experience with industry-standard simulation and debug tools (e.g., Synopsys VCS, Cadence Xcelium, Mentor Questa).
  • Solid understanding of digital design concepts, clock domain crossing (CDC), and low-power verification.
  • Proficiency in scripting languages (Python, Perl, Tcl, or Make) for automation.
  • Excellent analytical, debugging, and communication skills.
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