Ecosystem Technical Enabling Engineer

intel; Región Centro; Presencial; MXN 900.000 - 1.200.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Hybrid work model

Descripción de la vacante

Intel's Data Center Group in Mexico seeks an Ecosystem Technical Enabling Engineer to extend IO technology coverage for IHV ecosystems and PoCs supporting Xeon server wins.

You will lead on-site engagements, collaborate with validation teams, and drive PoCs to demonstrate the value of emerging IO standards. Strong English and permanent work authorization are required.

Formación

• Bachelor's degree in Electrical or Computer Engineering.
• 6+ years with IO protocols, PCIe, CXL, UALink.
• Knowledge of server architecture, firmware, and drivers.
• Experience with validation and testing of current/next gen tech (PCIe 6/7, CXL 3/4).
• Able to read specs and translate to validation results; strong partner relationships.
• Advanced English proficiency; Mexican work authorization.

Responsabilidades

• Lead technical engagements with IHV accounts across product categories.
• Drive PoCs to demonstrate Xeon server value and enable design wins.
• Resolve blockers through cross-functional collaboration with validation teams.
• Develop and execute ecosystem enablement for emerging standards like UALink.

Educación

Bachelor's Degree in Electrical Engineering or Computer Engineering

Herramientas

PCIe

CXL

UALink

Linux

SVOS

Intel TEE-IO

ispci

Descripción del empleo

Job Description

Intel's Data Center Group (DCG) defines, develops, and sells Xeon server platforms to a broad range of market segments and sales channels, working closely with the IHV ecosystem to deliver high performance, functionally rich products with exceptional quality to the market. The Technology Strategy and Ecosystem Enabling (TSEE) organization are subject matter experts in server technologies including IO, memory, security, and more.

The TSEE organization is hiring an Ecosystem Technical Enabling Engineer to expand the IO Technology Technical Marketing team's coverage of IHV ecosystem accounts, technologies, and Proofs of Concept (POCs) in support of Xeon server market segment share growth and design wins.

This engineer will leverage their expertise in server architecture and IO technologies to lead technical engagement with one or more IHV accounts across multiple product categories including GPUs, Ethernet adapters, PCIe and CXL switches, SSDs, retimers and CXL memory controllers. She or he will be responsible for proactively resolving technical issues that would block Xeon server design wins including driving CCBs and other customer support actions.

The engineer might also lead the execution of customer and ecosystem driven POCs to demonstrate the value of new technologies and to drive Xeon server competitiveness and market adoption.

Typical day might include:

• Working directly with an IHV engineer on-site to test and debug an IO device with a new Xeon server platform.
• Collaborating with validation engineers to improve test coverage for new technologies and resolve issues through our relationships with IHV partners.
• Hands‑on development of a Proof of Concept for Memory Pooling in support of Xeon server design wins.
• Develop and execute ecosystem technology enabling for emerging standards like UALink.

Minimum Qualifications

• Bachelor´s Degree in Electrical Engineering, Computer Engineering, or related field.
• 6+ years of experience working with:
• IO protocols, standards, and technologies including: PCIe, CXL, UALink.
• Server architecture and systems including firmware, driver stacks, rich IO configurations.
• "Hands-on" functional testing of systems with focus on the current and next generation technologies (e.g. PCIe 6 and 7, CXL 3 and 4).
• Reading and understanding technical specifications and applying this knowledge to the interpretation of validation and test results.
• Building strong and durable relationships with partners, customers, and peers.
• Advanced English level.
• Must have unrestricted - permanent right to work in Mexico (this position is not eligible for employment-based visa/immigration sponsorship).

Preferred Qualifications

• Experience working independently while sharing knowledge and findings across organization and company boundaries.
• Familiarity and experience with a broad range of tools including protocol and network analyzers, software (e.g. Intel TEE-IO).
• Experience with the Linux operating system including IO specific Linux commands (e.g. ispci) as well as Intel's SVOS.
• Experience translating customer and ecosystem requirements into Functional Requirements, POCs, CCBs, and validation test cases.
• Basic understanding of basic coding languages, especially Python.
• Bias for action.

Job Type: Experienced Hire

Shift: Shift 1 (Mexico)

Primary Location: Mexico, Guadalajara

Additional Locations:

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust: N/A

Work Model for this Role: This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Additional Information: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.